Integration of a Double Polysilican, Fully Self-Aligned Bipolar Transistor into a 0 .5p1 BiCMOS Technology for Fast 4MBit SRAMs

The single polysilicon, non-self-aligned bipolar transistor in a 0.5pm BiCMOS technology has been converted to a double polysilicon, fully-selfaligned bipolar with little increase in process complexity. Improved bipolar performance in the form of smaller base resistance, larger knee current, higher peak cut-off frequency, and shorter ECL gate delay has been demonstrated. This technology will prove useful in meeting the requirements for higher performance in fast, high density, SRAM circuits.