论文信息 - Implementing Transparent BIST for Embedded Memories: The Transputer Case Study

Implementing Transparent BIST for Embedded Memories: The Transputer Case Study

This paper presents a procedure to test transputer embedded memory. The technique is based on Transparent BIST, which was implemented by software (transputer instruction set) and by taking advantage of the existing transputer hardware characteristics. The presented test procedure allows on-line fault detection for the transputer memory during periodical field tests. The main characteristics of the transputer and embedded memory are presented, as well as a detailed description of the test implementation and experimental results. Additionally, the degradation induced by the periodical field test in global system performance is discussed. The present test approach for the transputer embedded memory can also be applied at the board level in order to test the main memory system. In order to improve the performance of the latter type of test, we also describe some features being developed along with the PISH Project (Projeto Integrado de Software e Hardware - CNPq - Protem/CC).

[1] T. Calin,et al. A low-cost, highly reliable SEU-tolerant SRAM: prototype and test results , 1995 .

[2] Michael Nicolaidis,et al. SEU-tolerant SRAM design based on current monitoring , 1994, Proceedings of IEEE 24th International Symposium on Fault- Tolerant Computing.

[3] Michael Nicolaidis,et al. TRANSPARENT BIST FOR RAMS , 1992, Proceedings International Test Conference 1992.

[4] Inmos Limited,et al. OCCAM 2 reference manual , 1988 .

[5] Marian Marinescu,et al. Simple and Efficient Algorithms for Functional RAM Testing , 1982, ITC.

[6] M. Nicolaidis,et al. Design of built-in current sensors for concurrent checking in radiation environments , 1993 .

[7] Melvin A. Breuer,et al. Diagnosis and Reliable Design of Digital Systems , 1977 .

[8] Joao Paulo Kitajima. Modèles quantitatifs d'algorithmes parallèles , 1994 .

[9] Tatsuhiro Torii,et al. A new fault-tolerant multitransputer configuration for avionics two-lane systems , 1994, Microprocess. Microsystems.

[10] Haydn A. Thompson. Transputer-based fault tolerance in safety-critical systems , 1991 .

[11] Michael Nicolaidis,et al. A tool for automatic generation of BISTed and transparent BISTed RAMs , 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

[12] Corporate Inmos Limited. Transputer instruction set - a compiler writer's guide , 1988 .