Design of Multiple-Target Tracking System on Heterogeneous System-on-Chip Devices

Advanced driver-assistance systems (ADAS) generally embrace heterogeneous platforms consisting of central processing units and field-programmable gate arrays (FPGAs) to achieve higher performance and energy efficiency. The multiple-target tracking (MTT) system is an important component in most ADAS and is particularly suited for heterogeneous implementation to improve responsiveness. However, the platform heterogeneity necessitates numerous design decisions to obtain the optimal application partitioning between the processor and the FPGA. In this paper, multiple configurations of the MTT application have been investigated on the Xilinx Zynq commercial heterogeneous platform. An extensive design space exploration was performed to recommend the optimal configuration with high performance and energy efficiency. A reduction of more than 65%, both in execution time and energy consumption, has been obtained by the utilization of the heterogeneous architecture. Finally, an analytical model is proposed to estimate execution time and energy consumption to enable a rapid exploration of the different configurations and predict the performance that can be expected with future system-on-chip (SoC) platforms and radar sensors in ADAS.

[1]  Azim Eskandarian,et al.  Research advances in intelligent collision avoidance and adaptive cruise control , 2003, IEEE Trans. Intell. Transp. Syst..

[2]  Amnon Shashua,et al.  A Computer Vision System on a Chip: a case study from the automotive domain , 2005, 2005 IEEE Computer Society Conference on Computer Vision and Pattern Recognition (CVPR'05) - Workshops.

[3]  Hiroto Hosoda Automotive Image Recognition Processor IMAPCAR , 2006 .

[4]  Walter Stechele,et al.  Autovision – A Run-time Reconfigurable MPSoC Architecture for Future Driver Assistance Systems (Autovision – Eine zur Laufzeit rekonfigurierbare MPSoC Architektur für zukünftige Fahrerassistenzsysteme) , 2007, it Inf. Technol..

[5]  Yassin Elhillali,et al.  An MPSoC architecture for the Multiple Target Tracking application in driver assistant system , 2008, 2008 International Conference on Application-Specific Systems, Architectures and Processors.

[6]  Jehangir Khan Embedded multiprocessor architectures for automative driver assistance systems. (Architectures multiprocesseurs embarquées pour les systèmes d'aide à la conduite) , 2009 .

[7]  Yassin Elhillali,et al.  Trade-Off Exploration for Target Tracking Application in a Customized Multiprocessor Architecture , 2009, EURASIP J. Embed. Syst..

[8]  Atika Rivenq,et al.  Radar based collision avoidance system implementation in a reconfigurable MPSoC , 2009, 2009 9th International Conference on Intelligent Transport Systems Telecommunications, (ITST).

[9]  Rabie Ben Atitallah,et al.  An Improved Automotive Multiple Target Tracking System Design , 2010, 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools.

[10]  Fei-Yue Wang,et al.  Data-Driven Intelligent Transportation Systems: A Survey , 2011, IEEE Transactions on Intelligent Transportation Systems.

[11]  Yassin Elhillali,et al.  Dynamically reconfigurable architecture for a driver assistant system , 2011, 2011 IEEE 9th Symposium on Application Specific Processors (SASP).

[12]  Smaïl Niar,et al.  Radar signature in Multiple Target Tracking system for Driver Assistant application , 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[13]  Thambipillai Srikanthan,et al.  Modelling communication overhead for accessing local memories in hardware accelerators , 2013, 2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors.

[14]  Martin Lukasiewycz,et al.  Reconfigurable Computing in Next-Generation Automotive Networks , 2013, IEEE Embedded Systems Letters.

[15]  Smail Niar,et al.  Dynamically Reconfigurable Embedded Architectures for Safe Transportation Systems , 2014 .

[16]  Nau Ozaki,et al.  Implementation and evaluation of image recognition algorithm for an intelligent vehicle using heterogeneous multi-core SoC , 2015, The 20th Asia and South Pacific Design Automation Conference.

[17]  Yutaka Yamada,et al.  18.2 A 1.9TOPS and 564GOPS/W heterogeneous multicore SoC with color-based object classification accelerator for image-recognition applications , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

[18]  Anna Freud,et al.  Design And Analysis Of Modern Tracking Systems , 2016 .