Rigorous wafer topography simulation for investigating wafer alignment quality and robustness

We have been utilizing rigorous simulation software in order to predict the alignment mark signal quality and mark contrast variation induced by processes changes reliably. We have run simulations in order to understand which parameters influence alignment mark quality most and to determine the important parameters that can be manipulated in order to improve it. Simulation of alignment signals (also referred to as waveforms) has been done for resist marks and etched marks, coated and uncoated, as well as in presence of increasing topography complexity. To validate simulation analysis, mark signal collection for different processes (and/or variations of those) and products has been carried out; cross sections have also been generated.

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