A comparative study of heavy-ion and proton-induced bit-error sensitivity and complex burst-error modes in commercially available high-speed SiGe BiCMOS
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R. Reed | D. McMorrow | C. Seidleck | S. Buchner | B. Gilbert | C. Marshall | K. Fritz | R. Ladbury | R. Reed | S. Buchner | M. Carts | P. Marshall | K. Fritz | P. Riggs | B. Randall | B. Gilbert | A. Campbell | R. Ladbury | C. Seidleck | P. Marshall | A. Campbell | M. Carts | S. Currie | P. Riggs | B. Randall | S. Currie | D. McMorrow | C. Marshall
[1] T. Scott,et al. Application of a pulsed laser for evaluation and optimization of SEU-hard designs , 1999, 1999 Fifth European Conference on Radiation and Its Effects on Components and Systems. RADECS 99 (Cat. No.99TH8471).
[2] J. C. Pickel,et al. Heavy-ion broad-beam and microprobe studies of single-event upsets in 0.20-/spl mu/m SiGe heterojunction bipolar transistors and circuits , 2003 .
[3] Alvin J. Joseph,et al. 3-D simulation of heavy-ion induced charge collection in SiGe HBTs , 2003 .
[4] John D. Cressler,et al. An SEU hardening approach for high-speed SiGe HBT digital logic , 2003 .
[5] R. Reed,et al. Modeling of single-event effects in circuit-hardened high-speed SiGe HBT logic , 2001 .
[6] T. Scott,et al. Application of a pulsed laser for evaluation and optimization of SEU-hard designs [CMOS] , 1999 .
[7] S. Buchner,et al. Dependence of the SEU window of vulnerability of a logic circuit on magnitude of deposited charge , 1993 .
[8] John D. Cressler,et al. A comparison of SEU tolerance in high-speed SiGe HBT digital logic designed with multiple circuit architectures , 2002 .
[9] R. Reed,et al. Single event effects in circuit-hardened SiGe HBT logic at gigabit per second data rates , 2000 .
[10] P. W. Marshall,et al. Single Event Upset cross sections at various data rates , 1996 .
[11] J. Cressler,et al. Simulation of SEE-induced charge collection in UHV/CVD SiGe HBTs , 2000 .