The authors present a 5-V-only 14-b, 16 ksamples/s linear codec suitable as the audio part of a CCITT G722 codec. The device uses second-order sigma-delta modulation for both analog/digital (A/D) and digital/analog (D/A) conversion at 2.048 Msamples/s. A time-continuous modulator with integrated antialias filtering is used at the A/D side, obviating the need for an external antialiasing filter. The digital filters for decimation and interpolation are implemented with both a custom digital signal processor (DSP) and specialized hardware. The device was realized with 74000 transistors on a 31-mm/sup 2/ die in a 3- mu m SACMOS technology. A dynamic range of more than 80 dB and a passband ripple of 0.3 dB were attained with A/D and D/A paths in cascade. >
[1]
F. Welten,et al.
An 8MIPS CMOS digital signal processor
,
1986,
1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[2]
Bernhard E. Boser,et al.
The design of sigma-delta modulation analog-to-digital converters
,
1988
.
[3]
R. Luscher,et al.
A high density CMOS process
,
1985,
1985 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[4]
B. Hoefflinger,et al.
A CMOS pulse density modulator for high-resolution A/D converters
,
1984,
IEEE Journal of Solid-State Circuits.