Design & Simulation Of SMITHA: A Structured and Scalable Architecture For 3D Network on Chip Systems
暂无分享,去创建一个
[1] W. Dally,et al. Route packets, not wires: on-chip interconnection networks , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).
[2] Juha Plosila,et al. Network on Chip Routing Algorithms , 2006 .
[3] Tobias Bjerregaard,et al. A survey of research and practices of Network-on-chip , 2006, CSUR.
[4] Luca Benini,et al. Networks on Chips : A New SoC Paradigm , 2022 .
[5] Axel Jantsch,et al. A network on chip architecture and design methodology , 2002, Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002.
[6] J. Nurmi. Network-on-Chip: A New Paradigm for System-on-Chip Design , 2005, 2005 International Symposium on System-on-Chip.