Abstract The performance of interconnects containing micro- (pore size smaller than 2 nm) and meso-porous (pore size larger than 2 nm) interlevel dielectrics is influenced by material selection, integration scheme and virtually all fabrication steps. It is generally reported that the reliability margin of the dielectric/barrier/copper system is shrinking. Barrier and dielectric integrity play a most important role in line-to-line leakage and Time Dependent Dielectric Breakdown (TDDB) reliability. TDDB has never been an issue for Cu-SiO2 interconnects, but for sub-100 nm copper/barrier/low-k systems it becomes challenging. When monitoring the integrated dielectric properties early failures can be caused by weak integration interfaces, dielectric damage during the integration, defective diffusion barrier or other non-uniformities related to the damascene process. Recent advances are reviewed along with examples and reference to state of the art.
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