A reconfigurable pipelined data converter
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A reconfigurable data converter (RDC) for integrating with a FPGA is proposed. The RDC consists of a number of programmable data converter cells (PDCCs), which can be programmed to perform basic analog-to-digital and digital-to-analog functions that are required in pipelined converters. A programmable switching network is then used to group and connect a number of PDCCs to obtain different numbers of ADCs and DACs with different resolutions. When the RDC is integrated with a FPGA, it will provide a low cost solution for realizing low to medium volume mixed signal systems. To demonstrate this concept, a prototype RDC was designed in a 2 /spl mu/m CMOS process and tested by configuring the RDC into different data converters.
[1] A. Karanicolas,et al. A 15-b 1-Msample/s digitally self-calibrated pipeline ADC , 1993 .
[2] Gert Cauwenberghs. A micropower CMOS algorithmic A/D/A converter , 1995 .
[3] E. K. F. Lee. Reconfigurable data converter as a building block for mixed-signal test , 1997, Proceedings European Design and Test Conference. ED & TC 97.
[4] Siamak Mortezapour,et al. Low power data converters for specific a pplications , 2000 .