Graded Bit-Error-Correcting Codes With Applications to Flash Memory

Flash memory is a promising new storage technology. Supported by empirical data collected from a Flash memory device, we propose a class of codes that exploits the asymmetric nature of the error patterns in a Flash device using tensor product operations. We call these codes graded bit-error-correcting codes. As demonstrated on the data collected from a Flash chip, these codes significantly delay the onset of errors and therefore have the potential to prolong the lifetime of the memory device.

[1]  Lara Dolecek Towards longer lifetime of emerging memory technologies using number theory , 2010, 2010 IEEE Globecom Workshops.

[2]  Khaled A. S. Abdel-Ghaffar,et al.  Error-Correcting Codes for Flash Coding , 2011, IEEE Transactions on Information Theory.

[3]  Anxiao Jiang,et al.  Rank modulation for flash memories , 2008, 2008 IEEE International Symposium on Information Theory.

[4]  Richard D. Wesel,et al.  Soft Information for LDPC Decoding in Flash: Mutual-Information Optimized Quantization , 2011, 2011 IEEE Global Telecommunications Conference - GLOBECOM 2011.

[5]  P. Chaichanavong,et al.  Tensor-product Parity codes: combination with constrained codes and application to perpendicular recording , 2006, IEEE Transactions on Magnetics.

[6]  P. Chaichanavong,et al.  Tensor-product parity code for magnetic recording , 2006, IEEE Transactions on Magnetics.

[7]  Haruhiko Kaneko,et al.  Error Control Coding for Multilevel Cell Flash Memories Using Nonbinary Low-Density Parity-Check Codes , 2009, 2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

[8]  Lara Dolecek,et al.  Tackling intracell variability in TLC Flash through tensor product codes , 2012, 2012 IEEE International Symposium on Information Theory Proceedings.

[9]  Jehoshua Bruck,et al.  Codes for Asymmetric Limited-Magnitude Errors With Application to Multilevel Flash Memories , 2010, IEEE Transactions on Information Theory.

[10]  Ron M. Roth,et al.  Introduction to Coding Theory , 2019, Discrete Mathematics.

[11]  Torleiv Kløve,et al.  Systematic, Single Limited Magnitude Error Correcting Codes for Flash Memories , 2011, IEEE Transactions on Information Theory.

[12]  Paul H. Siegel,et al.  Characterizing flash memory: Anomalies, observations, and applications , 2009, 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

[13]  Jaekyun Moon,et al.  An Iteratively Decodable Tensor Product Code with Application to Data Storage , 2010, IEEE Journal on Selected Areas in Communications.

[14]  Paul H. Siegel,et al.  Characterization and error-correcting codes for TLC flash memories , 2012, 2012 International Conference on Computing, Networking and Communications (ICNC).

[15]  Moshe Schwartz,et al.  Quasi-Cross Lattice Tilings With Applications to Flash Memory , 2011, IEEE Transactions on Information Theory.

[16]  Yuan Zhou Introduction to Coding Theory , 2010 .

[17]  Jack K. Wolf,et al.  Error-locating codes-A new concept in error control , 1963, IEEE Trans. Inf. Theory.

[18]  Tong Zhang,et al.  Multilevel flash memory on-chip error correction based on trellis coded modulation , 2006, 2006 IEEE International Symposium on Circuits and Systems.

[19]  Paul H. Siegel,et al.  On codes that correct asymmetric errors with graded magnitude distribution , 2011, 2011 IEEE International Symposium on Information Theory Proceedings.

[20]  Bella Bose,et al.  Optimal, Systematic, $q$-Ary Codes Correcting All Asymmetric and Symmetric Errors of Limited Magnitude , 2010, IEEE Transactions on Information Theory.

[21]  Jack K. Wolf,et al.  On codes derivable from the tensor product of check matrices , 1965, IEEE Trans. Inf. Theory.

[22]  Hideki Imai,et al.  Generalized tensor product codes , 1981, IEEE Trans. Inf. Theory.

[23]  Anxiao Jiang,et al.  Nonuniform codes for correcting asymmetric errors , 2011, 2011 IEEE International Symposium on Information Theory Proceedings.

[24]  J.K. Wolf,et al.  An Introduction to Tensor Product Codes and Applications to Digital Storage Systems , 2006, 2006 IEEE Information Theory Workshop - ITW '06 Chengdu.