ROM-less RNS-to-binary converter moduli {22n − 1, 22n + 1, 2n − 3, 2n + 3}

In this paper, a novel ROM-less RNS-to-binary converter is proposed, using a new balanced moduli set {22n -1, 22n + 1, 2n - 3, 2n + 3} for n even. The proposed converter is implemented with a two stage ROM-less approach, which computes the value of X based only in arithmetic operations, without using lookup tables. Experimental results for 24 to 120 bits of Dynamic Range, show that the proposed converter structure allows a balanced system with 20% faster arithmetic channels regarding the related state of the art, while requiring similar area resources. This improvement in the channel's performance is enough to offset the higher conversion costs of the proposed converter. Furthermore, up to 20% better Power-Delay-Product efficiency metric can be achieved for the full RNS architecture using the proposed moduli set.

[1]  Reto Zimmermann,et al.  Efficient VLSI implementation of modulo (2/sup n//spl plusmn/1) addition and multiplication , 1999, Proceedings 14th IEEE Symposium on Computer Arithmetic (Cat. No.99CB36336).

[2]  P. Mohan.  New reverse converters for the moduli set {2n-3,2n-1,2n+1,2n+3} , 2008 .

[3]  2014 International Symposium on Integrated Circuits (ISIC), Singapore, December 10-12, 2014 , 2014, ISIC.

[4]  Michael A. Soderstrand,et al.  Residue number system arithmetic: modern applications in digital signal processing , 1986 .

[5]  Ricardo Chaves,et al.  Arithmetic Units for RNS Moduli {2n-3} and {2n+3} Operations , 2010, 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools.

[6]  G. Jaberipur,et al.  Improved modulo-(2n ± 3) multipliers , 2013, The 17th CSI International Symposium on Computer Architecture & Digital Systems (CADS 2013).

[7]  Ricardo Chaves,et al.  Arithmetic-Based Binary-to-RNS Converter Modulo ${\{2^{n}{\pm}k\}}$ for $jn$ -bit Dynamic Range , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[8]  Laurent Imbert,et al.  a full RNS implementation of RSA , 2004, IEEE Transactions on Computers.

[9]  Ricardo Chaves,et al.  Binary-to-RNS Conversion Units for moduli {2^n ± 3} , 2011, 2011 14th Euromicro Conference on Digital System Design.

[10]  A. Omondi,et al.  Residue Number Systems: Theory and Implementation , 2007 .

[11]  Laurent-Stéphane Didier,et al.  A Generalization of a Fast RNS Conversion for a New 4-Modulus Base , 2009, IEEE Transactions on Circuits and Systems II: Express Briefs.

[12]  Ghassem Jaberipur,et al.  A ROM-less reverse RNS converter for moduli set {2q±1, 2q±3} , 2014, IET Comput. Digit. Tech..

[13]  Laurent-Stéphane Didier,et al.  A Generalization of a Fast RNS Conversion for a New 4-Modulus Base , 2009 .

[14]  Ming-Hwa Sheu,et al.  An efficient VLSI design for a residue to binary converter for general balance moduli (2n-3, 2n+1, 2n-1, 2n+3) , 2004, IEEE Trans. Circuits Syst. II Express Briefs.