The role of optical interconnects in the design of data center architectures

Abstract Optics have already found their way inside the data center (DC) by replacing electrical links for rack-to-rack interconnections. To cope with both the energy and bandwidth requirements, and to overcome the limitations of the electrical interconnects, DCs will have to deploy optical technologies not only in rack-to-rack but also in smaller packaging modules and lower levels of their architectures, namely board-to-board, on-board, and even on-chip. In this chapter the architectures proposed for these packaging levels are briefly surveyed. Implementing and laying out complex topologies via optical waveguides on the on-board (Optical Printed Circuit Boards) level presents a number of issues that have to be considered when designing architectures for DCs. To address these issues, we outline appropriate and general lay-out strategies for both point-to-point and multi-point topologies for OPCBs.

[1]  K. Hasharoni,et al.  A high end routing platform for core and edge applications based on chip to chip optical interconnect , 2013, 2013 Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference (OFC/NFOEC).

[2]  J E Simsarian,et al.  Photonic terabit routers: The IRIS project , 2010, 2010 Conference on Optical Fiber Communication (OFC/NFOEC), collocated National Fiber Optic Engineers Conference.

[3]  Roberto Proietti,et al.  DOS - A scalable optical switch for datacenters , 2010, 2010 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS).

[4]  Ray T. Chen,et al.  Fully embedded board-level guided-wave optoelectronic interconnects , 2000, Proceedings of the IEEE.

[5]  Jeffrey A. Kash,et al.  Optical interconnects for high performance computing , 2012, 2009 Asia Communications and Photonics conference and Exhibition (ACP).

[6]  Alyssa B. Apsel,et al.  Leveraging Optical Technology in Future Bus-based Chip Multiprocessors , 2006, 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06).

[7]  Ashok V. Krishnamoorthy,et al.  Silicon-photonic network architectures for scalable, power-efficient multi-chip systems , 2010, ISCA '10.

[8]  Roberto Proietti,et al.  Scalable Optical Interconnect Architecture Using AWGR-Based TONAK LION Switch With Limited Number of Wavelengths , 2013, Journal of Lightwave Technology.

[9]  B. J. Offrein,et al.  FirstLight: Pluggable Optical Interconnect Technologies for Polymeric Electro-Optical Printed Circuit Boards in Data Centers , 2012, Journal of Lightwave Technology.

[10]  Jung Ho Ahn,et al.  Corona: System Implications of Emerging Nanophotonic Technology , 2008, 2008 International Symposium on Computer Architecture.

[11]  Moray McLaren,et al.  A high-speed optical multi-drop bus for computer interconnections , 2009 .

[12]  Christopher Batten,et al.  Silicon-photonic clos networks for global on-chip communication , 2009, 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip.

[13]  George Kurian,et al.  ATAC: A 1000-core cache-coherent processor with on-chip optical network , 2010, 2010 19th International Conference on Parallel Architectures and Compilation Techniques (PACT).

[14]  Shan Zhong,et al.  Fully programmable and scalable optical switching fabric for petabyte data center. , 2015, Optics express.

[15]  David H. Albonesi,et al.  Phastlane: a rapid transit optical routing network , 2009, ISCA '09.

[16]  K. Bergman,et al.  An Experimental Validation of a Wavelength-Striped, Packet Switched, Optical Interconnection Network , 2009, Journal of Lightwave Technology.

[17]  Richard V. Penty,et al.  A 40 Gb/s Optical Bus for Optical Backplane Interconnections , 2014, Journal of Lightwave Technology.

[18]  Emmanouel A. Varvarigos,et al.  VLSI layout and packaging of butterfly networks , 2000, SPAA '00.

[19]  Luca P. Carloni,et al.  Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors , 2008, IEEE Transactions on Computers.

[20]  Rami G. Melhem,et al.  Space Multiplexing of Waveguides in Optically Interconnected Multiprocessor Systems , 1989, Comput. J..

[21]  Emmanouel A. Varvarigos,et al.  Laying out interconnects on optical printed circuit boards , 2014, 2014 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS).

[22]  Christopher Batten,et al.  Re-architecting DRAM memory systems with monolithically integrated silicon photonics , 2010, ISCA.

[23]  Emmanouel A. Varvarigos,et al.  Multilayer VLSI layout for interconnection networks , 2000, Proceedings 2000 International Conference on Parallel Processing.

[24]  Felix Betschon,et al.  960 Gb/s Optical Backplane Ecosystem Using Embedded Polymer Waveguides and Demonstration in a 12G SAS Storage Array , 2013, Journal of Lightwave Technology.

[25]  Xiaohui Lin,et al.  Optical bus waveguide metallic hard mold fabrication with opposite 45° micro-mirrors , 2010, OPTO.

[26]  Kazuo Iwama,et al.  Routing Problems on the Mesh of Buses , 1992, ISAAC.

[27]  Amin Vahdat,et al.  A scalable, commodity data center network architecture , 2008, SIGCOMM '08.

[28]  Rami G. Melhem,et al.  Pipelined Communications in Optically Interconnected Arrays , 1991, J. Parallel Distributed Comput..

[29]  Yu Zhang,et al.  Firefly: illuminating future network-on-chip with nanophotonics , 2009, ISCA '09.

[30]  John Kim,et al.  FlexiShare: Channel sharing for an energy-efficient nanophotonic crossbar , 2010, HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture.

[31]  Amin Vahdat,et al.  Helios: a hybrid electrical/optical switch architecture for modular data centers , 2010, SIGCOMM '10.

[32]  Atul Singh,et al.  Proteus: a topology malleable data center network , 2010, Hotnets-IX.

[33]  Isabella Cerutti,et al.  Energy efficiency and scalability of multi-plane optical interconnection networks for computing platforms and data centers , 2012, OFC/NFOEC.

[34]  R. Luijten,et al.  Optical interconnection networks: The OSMOSIS project , 2004, The 17th Annual Meeting of the IEEELasers and Electro-Optics Society, 2004. LEOS 2004..

[35]  Christopher Batten,et al.  Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics , 2008, 2008 16th IEEE Symposium on High Performance Interconnects.

[36]  Avinash Karanth Kodi,et al.  Exploring the Design of 64- and 256-Core Power Efficient Nanophotonic Interconnect , 2010, IEEE Journal of Selected Topics in Quantum Electronics.

[37]  Konstantina Papagiannaki,et al.  c-Through: part-time optics in data centers , 2010, SIGCOMM '10.

[38]  A. Wonfor,et al.  A terabit capacity passive polymer optical backplane based on a  novel meshed waveguide architecture , 2009 .

[39]  Feng Zhou,et al.  The Y-architecture: yet another on-chip interconnect solution , 2003, ASP-DAC '03.