Approximation approach for timing jitter characterization in circuit simulators

A new computational concept of timing jitter is proposed that is suitable for exploitation in circuit simulators. It is based on the approximation of computed noise characteristics. To define jitter value the parameter representation is used. The desired parameters are obtained after noise simulation process in time domain by minimization of integral residual L/sub 2/-norm. The approach is illustrated by examples of jitter computation using spice-like simulator.

[1]  Beomsup Kim,et al.  PLL/DLL system noise analysis for low jitter clock synthesizer design , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[2]  F. Kaertner.  Determination of the correlation spectrum of oscillators with low noise , 1989 .

[3]  Georges G. E. Gielen,et al.  A behavioral simulation tool for continuous-time /spl Delta//spl Sigma/ modulators , 2002, IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002..

[4]  A. Demir,et al.  Phase noise in oscillators: a unifying theory and numerical methods for characterization , 2000 .

[5]  A. Sangiovanni-Vincentelli,et al.  Simulation and modeling of phase noise in open-loop oscillators , 1996, Proceedings of Custom Integrated Circuits Conference.

[6]  Hiroshi Tanimoto,et al.  Separation of Phase Noise from Amplitude Noise in Oscillator Simulation , 1997 .

[7]  Mark M. Gourary,et al.  A new approach for computation of timing jitter in phase locked loops , 2000, DATE '00.

[8]  Alper Demir,et al.  Phase noise in oscillators: a unifying theory and numerical methods for characterisation , 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

[9]  Gabor C. Temes,et al.  Oversampling delta-sigma data converters : theory, design, and simulation , 1992 .

[10]  Alper Demir,et al.  Analysis and Simulation of Noise in Nonlinear Electronic Circuits and Systems , 1997 .

[11]  John A. McNeill.  Jitter in ring oscillators , 1997 .

[12]  K. Francken,et al.  DAISY: a simulation-based high-level synthesis tool for /spl Delta//spl Sigma/ modulators , 2000, IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140).

[13]  Franz X. Kärtner,et al.  Analysis of white and f-α noise in oscillators , 1990, Int. J. Circuit Theory Appl..

[14]  J. Phillips,et al.  Noise in mixers, oscillators, samplers, and logic an introduction to cyclostationary noise , 2000, Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044).

[15]  Georges G. E. Gielen,et al.  Efficient time-domain simulation of continuous-time /spl Delta//spl Sigma/ A/D converters using analytical integration , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[16]  Ali Hajimiri,et al.  A general theory of phase noise in electrical oscillators , 1998 .

[17]  M.M. Gourary,et al.  A new approach for computation of timing jitter in phase locked loops , 2000, Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537).

[18]  J. Huijsing,et al.  A 1.8-mW CMOS /spl Sigma//spl Delta/ modulator with integrated mixer for A/D conversion of IF signals , 2000, IEEE Journal of Solid-State Circuits.

[19]  S. G. Rusakov,et al.  A new numerical method for transient noise analysis of nonlinear circuits , 1999, Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198).

[20]  Tetsuro Itakura,et al.  Numerical noise analysis for nonlinear circuits with a periodic large signal excitation including cyclostationary noise sources , 1993 .

[21]  Kenneth S. Kundert.  Modeling and Simulation of Jitter in Phase-Locked Loops , 1997 .

[22]  MODELING AND SIMULATION OF JITTER IN PLL , 1998 .

[23]  Behzad Razavi,et al.  A study of phase noise in CMOS oscillators , 1996, IEEE J. Solid State Circuits.

[24]  A. Abidi,et al.  Noise in relaxation oscillators , 1983 .

[25]  Beomsup Kim,et al.  Analysis of timing jitter in CMOS ring oscillators , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.