Embedded Memory and ARM Cortex-M0 Core Using 60-nm C-Axis Aligned Crystalline Indium–Gallium–Zinc Oxide FET Integrated With 65-nm Si CMOS

Low-power embedded memory and an ARM Cortex-M0 core that operate at 30 MHz were fabricated in combination with a 60-nm c-axis aligned crystalline indium–gallium–zinc oxide FET and a 65-nm Si CMOS. The embedded memory adopted a structure wherein oxide semiconductor-based 1T1C cells are stacked on Si sense amplifiers. This memory achieved a standby power of 3 nW while retaining data and an active power of 11.7 $\mu \text{W}$ /MHz by making each bitline as short as each sense amplifier. The Cortex-M0 core adopted a flip-flop (FF) in which an oxide semiconductor-based 3T1C cell is stacked on the Si scan FF cell without area overhead, and achieved a standby power of 6 nW while retaining data. This combination of embedded memory and Cortex-M0 core can provide high-performance as well as low-power operation, which is essential for Internet of Things devices.