Multi-Run Tests Based on Address Changing

The chapter examines the technique of multi-run tests based on address sequence reordering. First, the properties of different address sequences as well as methods of their generation are analyzed and investigated. Then, the effective algorithm for generating address sequences based on bit shifting is presented. Finally, two-run march testing with address decimation is considered and the definition of optimal initial conditions for a two-run march test is provided as a result.

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