Design and implementation of AMBA ASB APB bridge

The 32 bit AMBA ASB APB Bridge provides an interface between the Advanced System Bus (ASB) and the Advanced Peripheral Bus (APB). It inserts wait states for burst of read or write transfers when the ASB must wait for the APB. The bridge is designed to respond to transaction requests from the currently enabled ASB master. The ASB transactions are converted into APB transactions. APB peripherals do not need a clock input as the APB access is timed with a strobe signal generated by the ASB to APB bridge interface. The AMBA ASB APB Bridge is modeled using Verilog HDL and validated on SPARTAN 3E and results are visualized on ChipScope Pro.