Optimizing curvilinear ILT recipe development with machine learning based pattern selection

It is known that Inverse Lithography Technology (ILT) is the key to enable the semiconductor industry to move forward beyond 3nm node driven by design density and process window improvements. The test patterns used for recipe development play a critical role in achieving optimized ILT masks in terms of mask-friendliness, OPC convergence or multi-structure common focus range. The traditional way of test pattern selection is usually a clip-level manual search by considering of design rules, which inevitably may cause lack of critical design representations. In this paper, we introduce Mentor Graphics’ Calibre SONR, a Machine Learning (ML) method to implement design layouts clustering and automatic pattern selections for ILT recipe tuning on a full-chip level. It is shown that SONR enables comprehensive coverage of the layout complicity and hence improves the robustness in the real full chip run. In addition, it improves productivity for recipe tuning without suffering any loss in the wafer performance by simulation in terms of EPE convergence, PVBand and common DOF.