Thermal Impedance Monitoring during Power Cycling Tests

In this publication a new method of thermal impedance analysis of power modules is presented. It en& able s a distinction of different failure mechanisms within the heat flow path by electrical measurement during power cycling tests. With measurement and evaluation of the thermal impedance Zth the degra& dati on can be located within chip solder layer, system solder layer and thermal interface material. 1 Motivation Reliability of power modules at power and thermal cycling load is determined by the deterioration of the heat flow path between die and heat sink or coolant. Up today during accelerated reliability tests this failure is detected by increase of the online measured quasi steady&state thermal resistance R th. Ther eby the increased Rth is caused by degradations in different layers of the heat flow path of the modu le between junction and reference temperature point, usually the case or heat sink temperature. By standard the failure criterion is a 20% increase of the initial value. The monitored trend of the Rth does not provide any information which layer degraded. Further, due to noisy measurement data, low variations of the thermal resistance caused by the deterioration of materials remain undetected. Therefore the failure analyses are performed subsequently with Scanning Acoustic Microscopy, X&ray or metallographic preparation to obtain more detailed information about the aging status of the power module. These analyses are time&consuming, several of them destructive and do not always deliver convincing analysis results. The monitoring of thermal impedance parameters promises a simpler and faster non&destructive analysis method for power modules during reliability tests.

[1]  Josef Lutz,et al.  Semiconductor Power Devices , 2011 .

[2]  G. Wachutka,et al.  Combination of thermal subsystems modeled by rapid circuit transformation , 2007, 2007 13th International Workshop on Thermal Investigation of ICs and Systems (THERMINIC).

[3]  C. Lawson,et al.  Solving least squares problems , 1976, Classics in applied mathematics.

[4]  Samuel Hartmann,et al.  Observation of chip solder degradation by electrical measurements during power cycling , 2010, 2010 6th International Conference on Integrated Power Electronics Systems.

[5]  Charles L. Lawson,et al.  Solving least squares problems , 1976, Classics in applied mathematics.