Test generation for mixed-signal devices using signal flow graphs

We describe a new reverse simulation approach to analog and mixed-circuit test generation that parallels the digital test generation process. We invert the signal flow graph of the analog circuit, reverse simulate it with good and bad machine outputs, and obtain component tolerances, given circuit output tolerances. The inverted graph lets us backtrace from analog outputs to get analog input sinusoids that justify them. Mixed-signal circuits are easily tested using this approach, and we present test generation results for three analog circuits and two mixed-signal circuits. This analog backtrace method can generate tests for high-order analog circuits and non-linear circuits, which cannot be handled by existing methods because they lack a fault model and a backtrace method.

[1]  Abhijit Chatterjee,et al.  Fault-based automatic test generator for linear analog circuits , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).

[2]  Ramaswami Dandapani,et al.  Hard faults diagnosis in analog circuits using sensitivity analysis , 1993, Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium.

[3]  T. M. Souders,et al.  Time domain testing strategies and fault diagnosis for analog systems , 1989 .

[4]  Norman Balabanian,et al.  Electrical Network Theory , 1969 .

[5]  Mani Soma,et al.  Analytical Fault Modeling And Static Test Generation For Analog ICs , 1994, IEEE/ACM International Conference on Computer-Aided Design.

[6]  D. M. H. Walker,et al.  VLASIC: A Catastrophic Fault Yield Simulator for Integrated Circuits , 1986, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[7]  Walter M. Lindermeir Design of robust test criteria in analog testing , 1996, ICCAD 1996.

[8]  Prabhakar Goel,et al.  An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits , 1981, IEEE Transactions on Computers.

[9]  J. K. Fidler,et al.  Differential-incremental-sensitivity relationships , 1972 .

[10]  Gerard N. Stenbakken,et al.  A comprehensive approach for modeling and testing analog and mixed-signal devices , 1990, Proceedings. International Test Conference 1990.

[11]  Abhijit Chatterjee Concurrent Error Detection in Linear Analog and Switched-Capacitor State Variable Systems Using Continuous Checksums , 1991 .

[12]  Sheng-Jen Tsai,et al.  Test Vector Generation for Linear Analog Devices , 1991, 1991, Proceedings. International Test Conference.

[13]  Bozena Kaminska,et al.  Multiple fault analog circuit testing by sensitivity analysis , 1993 .

[14]  Alberto L. Sangiovanni-Vincentelli,et al.  Minimizing production test time to detect faults in analog circuits , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[15]  Salvador Mir,et al.  Fault-based ATPG for linear analog circuits with minimal size multifrequency test sets , 1996, J. Electron. Test..

[16]  Gerard N. Stenbakken,et al.  LINEAR ERROR MODELING OF ANALOG AND MIXED-SIGNAL DEVICES , 1991, 1991, Proceedings. International Test Conference.

[17]  Bozena Kaminska,et al.  Optimization-based multifrequency test generation for analog circuits , 1996, J. Electron. Test..

[18]  Abhijit Chatterjee,et al.  Efficient multisine testing of analog circuits , 1995, Proceedings of the 8th International Conference on VLSI Design.

[19]  Wojciech Maly,et al.  FAULT MODELING FOR THE TESTING OF MIXED INTEGRATED CIRCUITS , 1991, 1991, Proceedings. International Test Conference.

[20]  Pierre Duhamel,et al.  Automatic test generation techniques for analog circuits and systems: A review , 1979 .

[21]  M. Ghausi,et al.  Multiparameter sensitivity in active RC networks , 1971 .

[22]  Matthew Mahoney,et al.  DSP-Based Testing of Analog and Mixed-Signal Circuits , 1987 .

[23]  Jacob A. Abraham,et al.  DCIATP-an iterative analog circuit test generation program for generating DC single pattern tests , 1988, International Test Conference 1988 Proceeding@m_New Frontiers in Testing.

[24]  Helmut Graeb,et al.  Design based analog testing by characteristic observation inference , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[25]  B. Kaminska,et al.  CLP-based multifrequency test generation for analog circuits , 1997, Proceedings. 15th IEEE VLSI Test Symposium (Cat. No.97TB100125).

[26]  Mani Soma,et al.  Fault diagnosis of flash ADC using DNL test , 1993, Proceedings of IEEE International Test Conference - (ITC).

[27]  Mani Soma,et al.  Dynamic test signal design for analog ICs , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[28]  E. Blum Numerical analysis and computation theory and practice , 1972 .

[29]  Abhijit Chatterjee,et al.  DRAFTS: Discretized Analog Circuit Fault Simulator , 1993, 30th ACM/IEEE Design Automation Conference.

[30]  Linda S. Milor,et al.  Detection of catastrophic faults in analog integrated circuits , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..