论文信息 - Analog Implementation of Reconfigurable Convolutional Neural Network Kernels

Analog Implementation of Reconfigurable Convolutional Neural Network Kernels

This paper presents a neuromorphic circuit implementation of a 3x3 CNN convolution kernel that consists of 9 four-quadrant analog multipliers and one ReLU analog circuit unit. The kernel circuit is powered by a single power supply of 1.2V and the inputs can be both negative and positive values centered at VDD/2 or 600mV with a dynamic range of ± 100mV. The multiplier can achieve an equivalent precision of 4-bit of a digital multiplier, and the ReLU can achieve the perfect rectification of input values. The complete kernel circuit is designed with SMIC (Semiconductor Manufacturing International Corporation) 55nm CMOS LP process and the power consumption of the multiplier and ReLU is less than 13.2µW and 14.4µW respectively under full input swing. The analog kernel is also reconfigurable to construct any size of convolution kernel matrix.

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