High-Level Synthesis: Status, Trends, and Future Directions

The availability of increasing computational power in system-on-chips (SoCs) continues to drive the development of new and ever more complex applications. Hardware implementations of digital signal processing algorithms enable faster, lower power and less costly wireless, wired or optical fiber communication. It also enables the higher data compression, processing and analysis of image and video. The internet of things (IoT) is expected to further drive the development of sensors, data processing on those sensors, their interconnectivity within themselves and with data processing centers.

[1]  Gary J. Sullivan,et al.  Overview of the High Efficiency Video Coding (HEVC) Standard , 2012, IEEE Transactions on Circuits and Systems for Video Technology.

[2]  Andrés Takach Design and verification using high-level synthesis , 2016, 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC).

[3]  Luca P. Carloni,et al.  High-level synthesis of accelerators in embedded scalable platforms , 2016, 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC).

[4]  Masahiro Fujita,et al.  Functional Equivalence Verification Tools in High-Level Synthesis Flows , 2009, IEEE Design & Test of Computers.