Designing and modeling of ultra low voltage and ultra low power LNA using ANN and ANFIS for Bluetooth applications

Abstract This paper reports the design of an ultra low voltage and ultra low power RF CMOS LNA using a two-stage common source-common gate topology with source inductive degeneration. The proposed structure reduced the supply voltage and power consumption. Considering the complexity of the analysis, it is necessary to simulate a neural model with high speed and accuracy. The proposed LNA is accurately modeled using ANN (MLP and RBF) and ANFIS. The model accuracy is evaluated for all the input–output parameters in the Bluetooth frequency range. A model of low voltage and low power LNA using ANN for Bluetooth applications is developed. The results show the average errors of 0.106%, 0.093% and 7.18×10−5% using MLP, RBF and ANFIS, respectively. It is observed that the ANFIS model is better than ANN for developing the model and increasing the input parameters.

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