LES: A Layout Expert System

In this paper we describe an expert system for layout generation in a hierarchical VLSI design system. It applies a combination of rule- and algorithmic-based techniques on a new layout style. Experimental results have demonstrated the superiority of this expert system against various standard-cell systems and its competitiveness with human designers.

[1]  N. H. E. Weste Mulga — an interactive symbolic layout system for the design of integrated circuits , 1981, The Bell System Technical Journal.

[2]  Leon I. Maissel,et al.  An Introduction to Array Logic , 1975, IBM J. Res. Dev..

[3]  A. J. Kessler,et al.  Standard cell VLSI design: A tutorial , 1985, IEEE Circuits and Devices Magazine.

[4]  A.D. Lopez,et al.  A dense gate matrix layout method for MOS VLSI , 1980, IEEE Transactions on Electron Devices.

[5]  Daniel P. Siewiorek,et al.  Exploiting Domain Knowledge in IC Cell Layout , 1984, IEEE Design & Test of Computers.

[6]  Bruce G. Buchanan,et al.  The MYCIN Experiments of the Stanford Heuristic Programming Project , 1985 .

[7]  P. W. Kollaritsch,et al.  TOPOLOGIZER: An Expert System Translator of Transistor Connectivity to Symbolic Cell Layout , 1984, ESSCIRC '84: Tenth European Solid-State Circuits Conference.

[8]  John P. McDermott,et al.  R1: A Rule-Based Configurer of Computer Systems , 1982, Artif. Intell..

[9]  A. Weinberger Large Scale Integration of MOS Complex Logic: A Layout Method , 1967 .

[10]  Lynn Conway,et al.  Introduction to VLSI systems , 1978 .

[11]  Harry G. Barrow,et al.  VERIFY: A Program for Proving Correctness of Digital Hardware Designs , 1984, Artif. Intell..

[12]  H. Penny Nii,et al.  Blackboard Systems, Part One: The Blackboard Model of Problem Solving and the Evolution of Blackboard Architectures , 1986, AI Mag..

[13]  Penny Nii The blackboard model of problem solving , 1986 .

[14]  Jin Kim,et al.  Computer Aids for IC Design , 1986, IEEE Software.

[15]  Tadashi Matsumoto ICOMP : an intelligent layout compactor , 1988 .