As a consequence of the increase in MPSoC complexity the on-chip communication bottleneck is becoming more challenging and higher performance links need to be designed more carefully. In order to avoid the conventional approach of multilevel ADCs, considering only energy efficient 1-bit comparators can be an alternative. To overcome the loss in terms of achievable rate due to coarse quantization the sampling rate is chosen much larger as suggested by conventional communication system designs. The corresponding channel is characterized by memory introduced by the low-pass characteristic which needs to be taken into account and can even be exploited. Different communication methods suitable for 1-bit reception have been reviewed. With respect to ASK modulation it is shown how to design sequences which are reconstructable for receivers equipped with a 1-bit ADC. It is shown that they even increase the achievable rate as compared to conventional ASK signaling using identically independent symbols. Further it is discussed how to exploit the high resolution in time domain by increasing the signaling rate of binary input symbols. In this regard the run-length limited codes are beneficial in terms of throughput. These approaches have been evaluated with a simple channel model for chip-to-chip communication using TSVs.
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