VLSI implementation of BER measurement for wireless communication system

This paper presents the Bit Error Rate (BER) performance of the wireless communication system. The complexity of modern wireless communication system are increasing at fast pace. It becomes challenging to design the hardware of wireless system. The proposed system consists of MIMO transmitter and MIMO receiver along with the along with a realistic fading channel. To make the data transmission more secure when the data are passed into channel Crypto-System with Embedded Error Control (CSEEC) is used. The system supports data security and reliability using forward error correction codes (FEC). Security is provided through the use of a new symmetric encryption algorithm, and reliability is provided by the use of FEC codes. The system aims at speeding up the encryption and encoding operations and reduces the hardware dedicated to each of these operations. The proposed system allows users to achieve more security and reliable communication. The proposed BER measurement communication system consumes low power compared to existing systems. Advantage of VLSI based BER measurement it that they can be used in the Real time applications and it provides single chip solution.

[1]  B. F. Cockburn,et al.  Accurate multiple-input multiple-output fading channel simulator using a compact and highthroughput reconfigurable architecture , 2011, IET Commun..

[2]  Bruce F. Cockburn,et al.  Reconfigurable performance measurement system-on-a-chip for baseband wireless algorithm design and verification , 2012, IEEE Wireless Communications.

[3]  Bruce F. Cockburn,et al.  A Compact and Accurate Gaussian Variate Generator , 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[4]  Bruce F. Cockburn,et al.  Hardware Implementation of Rayleigh and Ricean Variate Generators , 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[5]  Amirhossein Alimohammad,et al.  FPGA-Based Bit Error Rate Performance Measurement of Wireless Systems , 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[6]  Bruce F. Cockburn,et al.  Hardware-based Error Rate Testing of Digital Baseband Communication Systems , 2008, 2008 IEEE International Test Conference.

[7]  Bruce F. Cockburn,et al.  An Accurate MIMO Fading Channel Simulator Using a Compact and High-Throughput Reconfigurable Architecture , 2010 .

[8]  Wayne Luk,et al.  A Gaussian noise generator for hardware-based simulations , 2004, IEEE Transactions on Computers.

[9]  Bruce F. Cockburn,et al.  A Novel Technique for Efficient Hardware Simulation of Spatiotemporally Correlated MIMO Fading Channels , 2008, 2008 IEEE International Conference on Communications.

[10]  Bruce F. Cockburn,et al.  An FPGA-Based Simulator for High Path Count Rayleigh and Rician Fading , 2010, IEEE Transactions on Vehicular Technology.

[11]  Bruce F. Cockburn,et al.  A flexible layered architecture for accurate digital baseband algorithm development and verification , 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

[12]  Bruce F. Cockburn,et al.  FPGA-Accelerated Baseband Design and Verification of Broadband MIMO Wireless Systems , 2009, 2009 First International Conference on Advances in System Testing and Validation Lifecycle.

[13]  Bruce F. Cockburn,et al.  Hardware Implementation of Nakagami and Weibull Variate Generators , 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.