ICCAD-2015 CAD contest in incremental timing-driven placement and benchmark suite

At modern technology nodes, improving routability and reducing total wirelength are no longer sufficient to close timing. Incremental timing-driven placement (TDP) seeks to resolve timing violations while limiting the impact to the original placement in an effort to achieve timing closure. To improve the timing landscape in localized regions, some latches or nets may require specialized attention that may not be available in other traditional placement flows (e.g., wirelength-driven). To address this problem, the ICCAD-2015 contest encourages advanced research in incremental timing-driven placement, by providing (i) a flexible timing-oriented placement framework, including a publicly-available and high-quality academic timer, (ii) a set of realistic benchmarks that facilitates academic and commercial collaboration, (iii) an evaluation metric that objectively defines the quality of newly-developed algorithms.

[1]  Kia Bazargan,et al.  Incremental Placement for Timing Optimization , 2003, ICCAD 2003.

[2]  Amit Chowdhary,et al.  How accurately can we model timing in a placement engine? , 2005, Proceedings. 42nd Design Automation Conference, 2005..

[3]  Igor L. Markov,et al.  MAPLE: multilevel adaptive placement for mixed-size designs , 2012, ISPD '12.

[4]  Chris C. N. Chu,et al.  FLUTE: Fast Lookup Table Based Rectilinear Steiner Minimal Tree Algorithm for VLSI Design , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[5]  David Z. Pan,et al.  A new LP based incremental timing driven placement for high performance designs , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[6]  J. Lillis,et al.  An LP-based methodology for improved timing-driven placement , 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

[7]  Ismail Bustany,et al.  ISPD 2014 benchmarks with sub-45nm technology rules for detailed-routing-driven placement , 2014, ISPD '14.

[8]  Jarrod A. Roy,et al.  The ISPD-2011 routability-driven placement contest and benchmark suite , 2011, ISPD '11.

[9]  Gi-Joon Nam,et al.  Techniques for Fast Physical Synthesis , 2007, Proceedings of the IEEE.

[10]  Chandramouli V. Kashyap,et al.  Closed-form expressions for extending step delay and slew metrics to ramp inputs for RC trees , 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[11]  David Blaauw,et al.  A simple metric for slew rate of RC circuits based on two circuit moments , 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[12]  W. C. Elmore.  The Transient Response of Damped Linear Networks with Particular Regard to Wideband Amplifiers , 1948 .

[13]  Jan M. Rabaey,et al.  Digital integrated circuits: a design perspective / Jan M. Rabaey, Anantha Chandrakasan, Borivoje Nikolic , 2003 .

[14]  Yao-Wen Chang,et al.  NTUplace3: An Analytical Placer for Large-Scale Mixed-Size Designs With Preplaced Blocks and Density Constraints , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[15]  Jarrod A. Roy,et al.  ITOP: integrating timing optimization within placement , 2010, ISPD '10.

[16]  Jan-Ming Ho,et al.  Zero skew clock routing with minimum wirelength , 1992 .

[17]  Charles J. Alpert,et al.  Path smoothing via discrete optimization , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[18]  Jin Hu,et al.  Sensitivity-guided metaheuristics for accurate discrete gate sizing , 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[19]  Natarajan Viswanathan,et al.  ICCAD-2012 CAD contest in design hierarchy aware routability-driven placement and benchmark suite , 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[20]  José Luís Almada Güntzel,et al.  Timing-Driven Placement Based on Dynamic Net-Weighting for Efficient Slack Histogram Compression , 2015, ISPD.

[21]  Lawrence T. Pileggi,et al.  The Elmore delay as a bound for RC trees with generalized input signals , 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[22]  Jan M. Rabaey,et al.  Digital Integrated Circuits: A Design Perspective , 1995 .

[23]  Jia Wang,et al.  TAU 2013 variation aware timing analysis contest , 2013, ISPD '13.

[24]  Igor L. Markov,et al.  ComPLx: A competitive primal-dual Lagrange optimization for global placement , 2012, DAC Design Automation Conference 2012.

[25]  Andrew B. Kahng,et al.  Horizontal benchmark extension for improved assessment of physical CAD research , 2014, GLSVLSI '14.

[26]  Subhrajit Bhattacharya,et al.  Keeping hot chips cool , 2005, Proceedings. 42nd Design Automation Conference, 2005..

[27]  Natarajan Viswanathan,et al.  ICCAD-2013 CAD contest in placement finishing and benchmark suite , 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[28]  Myung-Chul Kim,et al.  ICCAD-2014 CAD contest in incremental timing-driven placement and benchmark suite: Special session paper: CAD contest , 2014, 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[29]  Chris C. N. Chu,et al.  Fitted Elmore delay: a simple and accurate interconnect delay model , 2002, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[30]  Wei Chen,et al.  Simultaneous gate sizing and placement , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[31]  Rupesh S. Shelar.  An efficent clustering algorithm for low power clock tree synthesis , 2007, ISPD '07.

[32]  Steven M. Burns,et al.  The ISPD-2012 discrete cell sizing contest and benchmark suite , 2012, ISPD '12.

[33]  Natarajan Viswanathan,et al.  The DAC 2012 routability-driven placement contest and benchmark suite , 2012, DAC Design Automation Conference 2012.

[34]  Igor L. Markov,et al.  RUMBLE: An Incremental Timing-Driven Physical-Synthesis Optimization Algorithm , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[35]  Dongjin Lee,et al.  SimPL: an algorithm for placing VLSI circuits , 2013, CACM.