3-Level Buck Converter Analysis and Specific Components Models

From the results of the Buck converter design space exploration, the implementation of a different converter topology is proposed in this chapter. Having discussed some of the required characteristics to reduce the power losses, and consequently increase the converter power efficiency, the 3-level Buck converter presented by Meynard and Foch in 1992 (Power Electronics Specialists conference, 1992. PESC’92 Record, 23rd Annual IEEE, Toledo), is selected. Then, the analysis of the converter operation is presented since it is required for its microelectronic implementation and the low power operation. To develope that, the converter operation analysis is subdivided as a function of the output voltage (\(V_o\lessgtr V_{\mathit{bat}}/2\)), and the operating mode (CCM or DCM). From this analysis, the main characteristics are compared with those from the classical Buck converter. After that, a self-driving scheme to supply the power drivers and make possible the use of shorter channel transistors (core transistors), is proposed. Finally, detailed additional component models required to carry out the corresponding design space exploration are provided, as well as some design considerations.