Pipeline architecture for two-dimensional discrete cosine transform and its inverse

In this paper, a pipeline architecture supporting both 8 /spl times/ 8 discrete cosine transform (DCT) and its inverse is described. A regular two-dimensional algorithm with perfect shuffle topology for DCT is derived. The resulting signal flow graph is mapped vertically onto sequential processing units. A similar pipeline architecture is derived for the inverse transform. The unified architecture is obtained by mapping both previous pipelines onto common resources. The proposed architecture contains three multipliers for 8 /spl times/ 8 transforms and its throughput can be increased with additional pipelining.