Improving the Performance of the Digital Predistorter Based on Sample Reuse- Rls Algorithm

In this paper, a modification is introduced over the conventional recursive least square (RLS) algorithm for designing adaptive digital predistorter (DPD). The modification is performed using a sample reuse technique to raise the performance of the DPD even when using small number of samples. The designed DPD based on the new algorithm reduces the nonlinearity and memory effect problems of power amplifiers and gives better performance than the conventional RLS algorithm. In addition, the proposed algorithm gives the designer full control of the resulting error which can be conveniently determined for each application. Simulation results are performed using different types and numbers of input samples and different PA characteristics to compare between the performance of the classical and the modified algorithm.