State Assignment for Detecting Erroneous Transitions in Finite State Machines

A new concurrent error detection scheme for detecting faulty transitions in finite state machines is presented. Instead of assigning codewords to states, codewords are assigned to transitions by an appropriate state assignment. For the detection of one erroneous bit, it is possible in certain cases to find such an assignment without adding extra state bits. The resulting area overhead is determined for some benchmark examples. Finally, a system paradigm is sketched which uses error detection for soft error correction and reliability management