A Modified Method for General LDPC Bit-flipping Decoding

A modified method for general LDPC bit-flipping decoding is proposed in this paper. The proposed method consists of two parts: multi-bit flipping judgement algorithm and multi-bit flipping compensation algorithm, the first part trying to find the maximum acceptable number of bits to flipping at the same time to accelerated convergence process, and the second part to compensates the new errors introduced by the first part. The proposed decoding method can be easily used to modify different BF algorithms which means the hardware implementation is simple. The simulation results show that the proposed method can achieve 2.75% to 36.05% of bit-flipping timing reduction, 3.0% to 18.1% of BER reduction at SNR 0.2dB to 4dB compared with classic BF, IMWBF, LCWBF, and RRWBF.

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