Self-Testing Computers

Built-in-test techniques exploit hardware redundancy to provide continuous on-line monitoring of computer performance. Hardware's declining cost makes these techniques attractive, especially for modular computers.

[1]  Arthur D. Friedman,et al.  Efficient Design of Self-Checking Checker for any m-Out-of-n Code , 1978, IEEE Transactions on Computers.

[2]  Omur Tasar,et al.  A study of intermittent faults in digital computers , 1899 .

[3]  J. Goldberg,et al.  SIFT: Design and analysis of a fault-tolerant computer for aircraft control , 1978, Proceedings of the IEEE.

[4]  R. W. Watson,et al.  Self-checked computation using residue arithmetic , 1966 .

[5]  Daniel P. Siewiorek,et al.  C.vmp: The Analysis, Architecture and Implementation of a Fault Tolerant Multiprocessor. , 1976 .

[6]  R. Dandapani,et al.  On the Design of Logic Networks with Redundancy and Testability Considerations , 1974, IEEE Transactions on Computers.

[7]  Ruth M. Davis.  The DoD Initiative in Integrated Circuits , 1979, Computer.

[8]  D.P. Siewiorek,et al.  A case study of C.mmp, Cm*, and C.vmp: Part I—Experiences with fault tolerance in multiprocessor systems , 1978, Proceedings of the IEEE.

[9]  Richard I. Tanaka,et al.  Residue arithmetic and its applications to computer technology , 1967 .

[10]  Larry Sumney.  The United States Department of Defense program on Very High Speed Integrated Circuits /VHSIC/ , 1980 .

[11]  William E. Burr,et al.  Selecting a Military Computer Architecture , 1977, Computer.

[12]  Piero Maestrini,et al.  Error Detection and Correction by Product Codes in Residue Number Systems , 1974, IEEE Transactions on Computers.

[13]  A. E. Ritchie,et al.  No. 4 ESS: System objectives and organization , 1977, The Bell System Technical Journal.

[14]  James W. Gault,et al.  The application of microcomputers as on-line built-in-test elements , 1978 .

[15]  D. Queyssac.  Computers: Projecting VLSI's impact on microprocessors: Single-chip microcomputers with 1 million bits of information, English-language programming, and canned software are seen ahead , 1979, IEEE Spectrum.

[16]  Algirdas Avizienis,et al.  Fault-Tolerant Computing-Progress, Problems and Prospects , 1977, IFIP Congress.

[17]  Kishor S. Trivedi,et al.  Basic Research in Support of Concurrent Fault Monitoring in Modular Digital Systems. , 1978 .

[18]  James Edward Smith.  The design of totally self-checking combinational circuits. , 1976 .

[19]  T. R. N. Rao,et al.  Cyclic and multiresidue codes for arithmetic operations , 1971, IEEE Trans. Inf. Theory.

[20]  C. V. Ramamoorthy,et al.  Reliability Analysis of Systems with Concurrent Error Detection , 1975, IEEE Transactions on Computers.

[21]  W. C. Carter,et al.  Reliability modeling techniques for self-repairing computer systems , 1969, ACM '69.

[22]  John Francis Wakerly,et al.  Low-cost error detection techniques for small computers. , 1974 .

[23]  Daniel P. Siewiorek,et al.  Evaluation of the CFA Test Programs Via Formal Computer Descriptions , 1977, Computer.

[24]  David Lorge Parnas,et al.  Response to undesired events in software systems , 1976, ICSE '76.

[25]  Arthur E. Cooper,et al.  Development of On-Board Space Computer Systems , 1976, IBM J. Res. Dev..

[26]  Algirdas Avizienis,et al.  The STAR (Self-Testing And Repairing) Computer: An Investigation of the Theory and Practice of Fault-Tolerant Computer Design , 1971, IEEE Transactions on Computers.

[27]  D.P. Siewiorek,et al.  A case study of C.mmp, Cm*, and C.vmp: Part II—Predicting and calibrating reliability of multiprocessor systems , 1978, Proceedings of the IEEE.

[28]  J B Clary,et al.  A Preliminary Study of Built-in-Test for the Military Computer Family (MCF). , 1979 .

[29]  Samuel H. Fuller,et al.  Measurement and Evaluation of Alternative Computer Architectures , 1977, Computer.

[30]  A.L. Hopkins,et al.  FTMP—A highly reliable fault-tolerant multiprocess for aircraft , 1978, Proceedings of the IEEE.

[31]  George H. Maestri.  The retryable processor , 1972, AFIPS '72 (Fall, part I).

[32]  W. W. PETERSONt,et al.  Cyclic Codes for Error Detection * , 2022 .

[33]  Sudhakar M. Reddy,et al.  On Totally Self-Checking Checkers for Separable Codes , 1977, IEEE Transactions on Computers.

[34]  Algirdas Avizienis,et al.  Arithmetic Error Codes: Cost and Effectiveness Studies for Application in Digital System Design , 1971, IEEE Transactions on Computers.

[35]  J B Clary,et al.  A Study of a Standard BIT Circuit. , 1977 .