The inner workings of phase change memory: Lessons from prototype PCM devices

We describe observations into the inner workings of phase change memory devices, obtained by fabrication, electrical characterization, failure analysis, and modeling of prototype phase change memory devices over the past few years. Experiments involving the RESET and SET operations, the speed of SET operations, the impact of voltage polarity, and the drift of RESET resistances after programming have been performed. Our prototype devices include PCM “pore” devices down to 20nm in actual diameter, PCM “bridge” devices down to 20nm in width, and novel “parallel cell” devices designed to trade off resistance contrast for lower resistance drift. Simple resistors integrated in series with these devices allow programming with pulses down to <10ns pulse-widths. Highly accurate current measurements can be triggered as soon as 1 millisecond after programming, so that even five-minute-long measurements can capture drift over five orders of magnitude in time. A customized finite-difference PCM simulator is capable of handling large and arbitrary 3-D structures, and can be matched against fast electrical SET and RESET experiments, slow thin-film crystallization experiments, or optical pulse experiments. Our results suggest that many of the idiosyncrasies of real PCM devices — “telegraph”-like noise, the dependence of SET resistance on pulse duration, and the variability of both repeated programming events and drift measurements even on the same device — can be traced to the important yet under-appreciated role of poly-crystalline grains and grain boundaries within the PCM device.