Deterministic receptive processes are Kahn processes

Deterministic asynchronous concurrent formalisms are valuable because determinism greatly simplifies the design and validation of such systems and most concurrent formalisms are nondeterministic. This paper connects two of the more successful deterministic asynchronous formalisms: Kahn's dataflow networks and Josephs's deterministic receptive processes. The main result: a divergence-free deterministic receptive process is a Kahn process in that it can be modeled by a continuous function from input to output sequences, thus verifying it is compositionally deterministic. This result provides a bridge between two communities, enabling results from the asynchronous digital hardware community to be used in the context of dataflow computation and vice versa.

[1]  Marly Roncken,et al.  The VLSI-programming language Tangram and its translation into handshake circuits , 1991, Proceedings of the European Conference on Design Automation..

[2]  Edwin D. de Jong,et al.  Formalization of a software architecture for embedded systems: a process algebra for SPLICE , 1999, Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences. 1999. HICSS-32. Abstracts and CD-ROM of Full Papers.

[3]  Mark B. Josephs,et al.  Receptive process theory , 1992, Acta Informatica.

[4]  D. A. Edwards,et al.  The Balsa Asynchronous Circuit Synthesis System , 2000 .

[5]  Jan Tijmen Udding,et al.  A formal model for defining and classifying delay-insensitive circuits and systems , 1986, Distributed Computing.

[6]  E.A. Lee,et al.  Synchronous data flow , 1987, Proceedings of the IEEE.

[7]  M. B. Josephs,et al.  An overview of D-I algebra , 1993, [1993] Proceedings of the Twenty-sixth Hawaii International Conference on System Sciences.

[8]  John O'Leary,et al.  Synchronous emulation of asynchronous circuits , 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[9]  Ad M. G. Peeters,et al.  Synchronous handshake circuits , 2001, Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001.

[10]  A. B. Ardsley,et al.  SIMULATION AND ANALYSIS OF SYNTHESISED ASYNCHRONOUS CIRCUITS , 2022 .

[11]  Edward A. Lee,et al.  Dataflow process networks , 1995, Proc. IEEE.

[12]  C. A. R. Hoare,et al.  Communicating sequential processes , 1978, CACM.

[13]  Martin Rem,et al.  VLSI Programming of Asynchronous Circuits for Low Power , 1995 .

[14]  Gilles Kahn,et al.  The Semantics of a Simple Language for Parallel Programming , 1974, IFIP Congress.

[15]  Liz Sonenberg,et al.  Fixed Point Theorems and Semantics: A Folk Tale , 1982, Inf. Process. Lett..

[16]  van Ch Kees Berkel Handshake circuits : an intermediary between communicating processes and VLSI , 1992 .

[17]  Stephen A. Edwards,et al.  SHIM: A Language for Hardware/Software Integration , 2004, SYNCHRON.

[18]  Kees van Berkel,et al.  Handshake Circuits: An Asynchronous Architecture for VLSI Programming , 1993 .

[19]  Jan L. A. van de Snepscheut,et al.  Trace Theory and VLSJ Design , 1985, Lecture Notes in Computer Science.

[20]  Steven M. Nowick,et al.  Modeling and design of asynchronous circuits , 1999, Proc. IEEE.

[21]  Willem C. Mallon,et al.  Building finite automata from DI specifications , 1998, Proceedings Fourth International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[22]  Mark B. Josephs,et al.  An analysis of determinacy using a trace-theoretic model of asynchronous circuits , 2003, Ninth International Symposium on Asynchronous Circuits and Systems, 2003. Proceedings..