System Level Fixed-point Design Based On An Interpolative Approach

The design process for fixed-point implementations either in software or in hardware requires a bit-true specification of the algorithm in order to analyze quantization effects on an algorithmical level, abstracting from implementational details. On the other hand, system design starts from a floating-point description, so that a transformation of a floating-point description into a fixed-point description becomes necessary. Within this paper we present a tool that allows an automated, interactive transformation from floating-point ANSI-C into a bit-true specification based on a new data type fixed that is introduced as an extension to ANSI-C. The concept is rooted in a sophisticated data dependency analysis that allows to handle control structures as well as pointers. It is part of the fixed-point design environment FRIDGE which includes an advanced simulator that covers the extended ANSI-C syntax as well as target specific compilers which allow to generate efficient fixed-point implementations either for HW or for SW, starting from the bit-true algorithm specification.

[1]  Heinrich Meyr,et al.  Digital Receiver Design Using VHDL Generation From Data Flow Graphs , 1995, 32nd Design Automation Conference.

[2]  Raul Camposano Behavioral synthesis , 1995, IEEE Design & Test of Computers.

[3]  Wonyong Sung,et al.  Word-length determination and scaling software for a signal flow block diagram , 1994, Proceedings of ICASSP '94. IEEE International Conference on Acoustics, Speech and Signal Processing.

[4]  Seehyun Kim,et al.  Fixed-point optimization utility for C and C++ based digital signal processing programs , 1995, VLSI Signal Processing, VIII.