Defects Identification in a TSV Daisy-Chain Structure by a Machine Learning Approach

This work applies the paradigm of the machine learning to the identification of type and position of short-and open-circuit defects along a three-dimensional daisy-chain signal channel in presence of through silicon vias. A suitable artificial neural network is designed, trained, and used for this task. This contribution discusses the advantages and limitations of this approach quantifying the differences among the real and estimated positions of the defects.

[1]  Erhan Guven,et al.  A Survey of Data Mining and Machine Learning Methods for Cyber Security Intrusion Detection , 2016, IEEE Communications Surveys & Tutorials.

[2]  W. Dehaene,et al.  Electrical Modeling and Characterization of Through Silicon via for Three-Dimensional ICs , 2010, IEEE Transactions on Electron Devices.

[3]  Andrew B. Kahng,et al.  SI for free: machine learning of interconnect coupling delay and transition effects , 2015, 2015 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP).

[4]  Joungho Kim,et al.  Through Silicon Via (TSV) Defect Modeling, Measurement, and Analysis , 2017, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[5]  He Ming Yao,et al.  Machine learning based MoM (ML-MoM) for parasitic capacitance extractions , 2016, 2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS).

[6]  J. J. Moré,et al.  Levenberg--Marquardt algorithm: implementation and theory , 1977 .

[7]  Radford M. Neal.  Pattern Recognition and Machine Learning , 2007, Technometrics.

[8]  Jürgen Schmidhuber,et al.  Deep learning in neural networks: An overview , 2014, Neural Networks.

[9]  Jun Fan,et al.  Modeling optimization of test patterns used in de-embedding method for through silicon via (TSV) measurement in silicon interposer , 2016, 2016 IEEE International Symposium on Electromagnetic Compatibility (EMC).

[10]  Joungho Kim,et al.  Development and Evaluation of 3-D SiP with Vertically Interconnected Through Silicon Vias (TSV) , 2007, 2007 Proceedings 57th Electronic Components and Technology Conference.

[11]  Marco Dorigo,et al.  Genetics-based machine learning and behavior-based robotics: a new synthesis , 1993, IEEE Trans. Syst. Man Cybern..

[12]  Antonio Orlandi,et al.  Review of the Feature Selective Validation Method (FSV). Part I—Theory , 2018, IEEE Transactions on Electromagnetic Compatibility.

[13]  Joungho Kim,et al.  Localization of Short and Open Defects in Multilayer Through Silicon Vias (TSV) Daisy-Chain Structures , 2017, IEEE Transactions on Electromagnetic Compatibility.

[14]  M. Swaminathan,et al.  Transient Analysis of TSV Equivalent Circuit Considering Nonlinear MOS Capacitance Effects , 2015, IEEE Transactions on Electromagnetic Compatibility.

[15]  C. Lee Giles,et al.  Overfitting and neural networks: conjugate gradient and backpropagation , 2000, Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks. IJCNN 2000. Neural Computing: New Challenges and Perspectives for the New Millennium.

[16]  Walid Saad,et al.  Machine Learning for Wireless Networks with Artificial Intelligence: A Tutorial on Neural Networks , 2017, ArXiv.

[17]  Ethem Alpaydin,et al.  Introduction to machine learning , 2004, Adaptive computation and machine learning.

[18]  Dipanjan Gope,et al.  Eye Height/Width Prediction From $S$ -Parameters Using Learning-Based Models , 2016, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[19]  Kwang-Seong Choi,et al.  Modeling and analysis of open defect in through silicon via (TSV) channel , 2013, 2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo).

[20]  R. Tummala.  Introduction to System-On-Package (SOP): miniaturization of the entire system / Rao R. Tummala, Madhavan Swaminathan , 2008 .

[21]  Joungho Kim,et al.  Detection of open and short faults in 3D-ICs based on through silicon via (TSV) , 2017, 2017 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMCSI).

[22]  R. Tummala,et al.  Failure mechanisms and optimum design for electroplated copper Through-Silicon Vias (TSV) , 2009, 2009 59th Electronic Components and Technology Conference.

[23]  Zhen Zhou,et al.  Analytical Modeling and Analysis of through Silicon Vias (TSVs) in High Speed Three-Dimensional System Integration , 2015 .