Cellular Automata Based Key Stream Generator - A Reconfigurable Hardware Approach

Rapid developments in network-based application demand a special attention to protect the confidentiality of data. Cryptographic algorithms play a lead role in ensuring confidentiality assisted by key generation architecture. Keys have a fair role in modern cryptography, which can be generated through random number generators. To meet the real-time requirements, cryptographic primitives can be developed on reconfigurable hardware such as Field Programmable Gate Arrays (FPGAs). This work focuses on the development of Pseudo Random Number Generation (PRNG) architecture using Cellular Automata (CA) on Altera Cyclone II EP2C20F484C7 FPGA at an operating frequency of 50 MHz. Significantly, CA based random sequences were generated based on five rules namely R30, R90, R105, R150 and R165. The randomness of the proposed Pseudo Random Number Generator (PRNG) has been confirmed using entropy and NIST 800 – 22 tests. The proposed design has consumed only 461 logic elements which are 3% of total logic elements of target FPGA and also achieves a throughput of 51.603 Mbps for 128-bit PRNG with a power dissipation of 72.26 mW.

[1]  Zhang Min-xuan,et al.  Uniform Random Number Generator Using Leap Ahead LFSR Architecture , 2009, 2009 International Conference on Computer and Communications Security.

[2]  Indrajit Chakrabarti,et al.  A Parallel Stochastic Number Generator With Bit Permutation Networks , 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

[3]  Jacques M. Bahi,et al.  FPGA acceleration of a pseudorandom number generator based on chaotic iterations , 2014, J. Inf. Secur. Appl..

[4]  Dominique Barchiesi,et al.  Pseudo-random number generator based on mixing of three chaotic maps , 2014, Commun. Nonlinear Sci. Numer. Simul..

[5]  Elaine B. Barker,et al.  A Statistical Test Suite for Random and Pseudorandom Number Generators for Cryptographic Applications , 2000 .

[6]  P. Dabal,et al.  FPGA implementation of chaotic pseudo-random bit generators , 2012, Proceedings of the 19th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2012.

[7]  John Bosco Balaguru Rayappan,et al.  Logic Elements Consumption Analysis of Cellular Automata Based Image Encryption on FPGA , 2014 .

[8]  Marco Tomassini,et al.  Cryptography with cellular automata , 2001, Appl. Soft Comput..

[9]  Christophe Guyeux,et al.  Survey on hardware implementation of random number generators on FPGA: Theory and experimental analyses , 2018, Comput. Sci. Rev..

[10]  Je-Hoon Lee,et al.  Uniform Random Number Generator Using Leap-Ahead LFSR Architecture , 2012 .

[11]  Ismail Amr Ismail,et al.  A cryptosystem based on elementary cellular automata , 2013, Commun. Nonlinear Sci. Numer. Simul..

[12]  Christophe Guyeux,et al.  A Hardware and Secure Pseudorandom Generator for Constrained Devices , 2018, IEEE Transactions on Industrial Informatics.

[13]  Arne Thesen,et al.  RANDOM NUMBER GENERATORS , 1978 .

[14]  Cuauhtemoc Mancillas-López,et al.  Hardware implementation of pseudo-random number generators based on chaotic maps , 2017 .

[15]  Amirtharajan Rengarajan,et al.  Metastability-Induced TRNG Architecture on FPGA , 2019, Iranian Journal of Science and Technology, Transactions of Electrical Engineering.

[16]  Zhang Huanguo Evolutionary Random Sequence Generator Based on LFSR , 2007 .

[17]  Joseph Zambreno,et al.  A chaotic encryption scheme for real-time embedded systems: design and implementation , 2013, Telecommun. Syst..

[18]  A. Dandache,et al.  Real-time FPGA implementation of Lorenz's chaotic generator for ciphering telecommunications , 2009, 2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference.

[19]  Fausto Montoya Vitini,et al.  A Lightweight Pseudorandom Number Generator for Securing the Internet of Things , 2017, IEEE Access.

[20]  Howard C. Card,et al.  Parallel Random Number Generation for VLSI Systems Using Cellular Automata , 1989, IEEE Trans. Computers.

[21]  S. Ionita,et al.  FPGA Implementations of Cellular Automata for Pseudo-Random Number Generation , 2006, 2006 International Semiconductor Conference.

[22]  Lucian Petrica,et al.  FPGA optimized cellular automaton random number generator , 2018, J. Parallel Distributed Comput..

[23]  John Bosco Balaguru Rayappan,et al.  Dual Cellular Automata on FPGA: An Image Encryptors Chip , 2014 .

[24]  Howard C. Card,et al.  Cellular automata-based pseudorandom number generators for built-in self-test , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[25]  Concepción Aldea,et al.  Chaos-Based Bitwise Dynamical Pseudorandom Number Generator On FPGA , 2019, IEEE Transactions on Instrumentation and Measurement.

[26]  S. Wolfram Random sequence generation by cellular automata , 1986 .

[27]  Yicong Zhou,et al.  Sine Chaotification Model for Enhancing Chaos and Its Hardware Implementation , 2019, IEEE Transactions on Industrial Electronics.