A Pitch-Matched Front-End ASIC With Integrated Subarray Beamforming ADC for Miniature 3-D Ultrasound Probes

This paper presents a front-end application-specified integrated circuit (ASIC) integrated with a 2-D PZT matrix transducer that enables in-probe digitization with acceptable power dissipation for the next-generation endoscopic and catheter-based 3-D ultrasound imaging systems. To achieve power-efficient massively parallel analog-to-digital conversion (ADC) in a 2-D array, a 10-bit 30 MS/s beamforming ADC that merges the subarray beamforming and digitization functions in the charge domain is proposed. It eliminates the need for costly intermediate buffers, thus significantly reducing both power consumption and silicon area. Self-calibrated charge references are implemented in each subarray to further optimize the system-level power efficiency. High-speed datalinks are employed in combination with the subarray beamforming scheme to realize a 36-fold channel-count reduction and an aggregate output data rate of 6 Gb/s for a prototype receive array of $24 \times 6$ elements. The ASIC achieves a record power efficiency of 0.91 mW/element during receive. Its functionality has been demonstrated in both electrical and acoustic imaging experiments.

[1]  Chao Chen,et al.  A front-end ASIC with high-voltage transmit switching and receive digitization for forward-looking intravascular ultrasound , 2017, 2017 IEEE Custom Integrated Circuits Conference (CICC).

[2]  Zhao Chen,et al.  An element-matched band-pass delta-sigma ADC for ultrasound imaging , 2017, 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC).

[3]  Jan Craninckx,et al.  A 65fJ/Conversion-Step 0-to-50MS/s 0-to-0.7mW 9b Charge-Sharing SAR ADC in 90nm Digital CMOS , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[4]  Chao Chen,et al.  A front-end ASIC with receive sub-array beamforming integrated with a 32 × 32 PZT matrix transducer for 3-D transesophageal echocardiography , 2016, 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits).

[5]  Toby Xu,et al.  Single-chip CMUT-on-CMOS front-end system for real-time volumetric IVUS and ICE imaging , 2014, IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control.

[6]  Maysam Ghovanloo,et al.  Direct Digital Demultiplexing of Analog TDM Signals for Cable Reduction in Ultrasound Imaging Catheters , 2016, IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control.

[7]  Eisse Mensink,et al.  A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[8]  Boris Murmann,et al.  A 14 b 35 MS/s SAR ADC Achieving 75 dB SNDR and 99 dB SFDR With Loop-Embedded Input Buffer in 40 nm CMOS , 2015, IEEE Journal of Solid-State Circuits.

[9]  Okuma Yasuyuki,et al.  27.6 Single-chip 3072ch 2D array IC with RX analog and all-digital TX beamformer for 3D ultrasound imaging , 2017 .

[10]  Gerard C. M. Meijer,et al.  Ultrasound beamformer using pipeline-operated S/H delay stages and charge-mode summation , 2011 .

[11]  Maysam Ghovanloo,et al.  Design of frequency-division multiplexing front-end receiver electronics for CMUT-on-CMOS based intracardiac echocardiography , 2014, 2014 IEEE International Ultrasonics Symposium.

[12]  B. Savord,et al.  Fully sampled matrix transducer for real time 3D ultrasonic imaging , 2003, IEEE Symposium on Ultrasonics, 2003.

[13]  R. Phillips.  Guidance for Industry and FDA Staff Information for Manufacturers Seeking Marketing Clearance of Diagnostic Ultrasound Systems and Transducers , 2008 .

[14]  Peter R. Kinget,et al.  Current Reference Pre-Charging Techniques for Low-Power Zero-Crossing Pipeline-SAR ADCs , 2014, IEEE Journal of Solid-State Circuits.

[15]  Soon-Jyh Chang,et al.  A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure , 2010, IEEE Journal of Solid-State Circuits.

[16]  Boris Murmann,et al.  A Pixel Pitch-Matched Ultrasound Receiver for 3-D Photoacoustic Imaging With Integrated Delta-Sigma Beamformer in 28-nm UTBB FD-SOI , 2017, IEEE Journal of Solid-State Circuits.

[17]  Chao Chen,et al.  A compact 0.135-mW/channel LNA array for piezoelectric ultrasound transducers , 2015, ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC).

[18]  Robert W. Brodersen,et al.  A 6-bit 600-MS/s 5.3-mW asynchronous ADC in 0.13-μm CMOS , 2006 .

[19]  Byungsub Kim,et al.  A Single-Chip 64-Channel Ultrasound RX-Beamformer Including Analog Front-End and an LUT for Non-Uniform ADC-Sample-Clock Generation , 2017, IEEE Transactions on Biomedical Circuits and Systems.

[20]  Deep Bera,et al.  Multiline 3D beamforming using micro-beamformed datasets for pediatric transesophageal echocardiography. , 2018, Physics in medicine and biology.

[21]  Daehwa Paik,et al.  A low-noise self-calibrating dynamic comparator for high-speed ADCs , 2008, 2008 IEEE Asian Solid-State Circuits Conference.

[22]  O. Oralkan,et al.  Integration of 2D CMUT arrays with front-end electronics for volumetric ultrasound imaging , 2008, IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control.

[23]  Yoshihiro Hayashi,et al.  27.6 Single-chip 3072ch 2D array IC with RX analog and all-digital TX beamformer for 3D ultrasound imaging , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

[24]  Michiel A. P. Pertijs,et al.  A mixed-signal multiplexing system for cable-count reduction in ultrasound probes , 2015, 2015 IEEE International Ultrasonics Symposium (IUS).

[25]  Davide De Caro,et al.  New clock-gating techniques for low-power flip-flops , 2000, ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514).

[26]  Boris Murmann,et al.  27.5 A pixel-pitch-matched ultrasound receiver for 3D photoacoustic imaging with integrated delta-sigma beamformer in 28nm UTBB FDSOI , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

[27]  B.D. Steinberg,et al.  Digital beamforming in ultrasound , 1992, IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control.

[28]  Byungsub Kim,et al.  24.8 An analog-digital-hybrid single-chip RX beamformer with non-uniform sampling for 2D-CMUT ultrasound imaging to achieve wide dynamic range of delay and small chip area , 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

[29]  Anantha Chandrakasan,et al.  An ASIC for Energy-Scalable, Low-Power Digital Ultrasound Beamforming , 2016, 2016 IEEE International Workshop on Signal Processing Systems (SiPS).

[30]  Yangmo Yoo,et al.  A single FPGA-based portable ultrasound imaging system for point-of-care applications , 2012, IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control.

[31]  Yonina C. Eldar,et al.  Fourier-domain beamforming: the path to compressed ultrasound imaging , 2013, IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control.

[32]  Nico de Jong,et al.  A Front-End ASIC With Receive Sub-array Beamforming Integrated With a $32 \times 32$ PZT Matrix Transducer for 3-D Transesophageal Echocardiography , 2017, IEEE Journal of Solid-State Circuits.

[33]  C. Daft,et al.  5G-1 Two Approaches to Electronically Scanned 3D Imaging Using cMUTs , 2006, 2006 IEEE Ultrasonics Symposium.

[34]  Melanie Hartmann,et al.  Design Of Analog Cmos Integrated Circuits , 2016 .

[35]  Chao Chen,et al.  A 0.91mW/element pitch-matched front-end ASIC with integrated subarray beamforming ADC for miniature 3D ultrasound probes , 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

[36]  David M. Mills,et al.  4-D ICE: A 2-D Array Transducer With Integrated ASIC in a 10-Fr Catheter for Real-Time 3-D Intracardiac Echocardiography , 2016, IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control.

[37]  Franco Maloberti,et al.  A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS , 2010, IEEE Journal of Solid-State Circuits.

[38]  Young-Hwan Kim,et al.  A 128-ch Δ-Σ ADC based mixed signal IC for full digital beamforming Wireless handheld Ultrasound imaging system , 2015, 2015 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC).

[39]  Nico de Jong,et al.  Front-end receiver electronics for a matrix transducer for 3-D transesophageal echocardiography , 2012, IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control.

[40]  E. Samset,et al.  Diverging Wave Volumetric Imaging Using Subaperture Beamforming , 2016, IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control.

[41]  Nico de Jong,et al.  A Prototype PZT Matrix Transducer With Low-Power Integrated Receive ASIC for 3-D Transesophageal Echocardiography , 2016, IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control.

[42]  Peter A. Franaszek,et al.  A DC-Balanced, Partitioned-Block, 8B/10B Transmission Code , 1983, IBM J. Res. Dev..

[43]  Yong Ping Xu,et al.  A Compact, Low Input Capacitance Neural Recording Amplifier , 2013, IEEE Transactions on Biomedical Circuits and Systems.

[44]  Suhwan Kim,et al.  A 12.1mW, 60dB SNR, 8-channel beamforming embedded SAR ADC for ultrasound imaging systems , 2017, 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC).

[45]  Shen-Iuan Liu,et al.  A wide-range delay-locked loop with a fixed latency of one clock cycle , 2002, IEEE J. Solid State Circuits.

[46]  Jan Craninckx,et al.  A 70 dB DR 10 b 0-to-80 MS/s Current-Integrating SAR ADC With Adaptive Dynamic Range , 2014, IEEE Journal of Solid-State Circuits.