Voltage Follower is one of the most important analog circuits required in many analog integrated circuits. It is used for the impedance matching between high impedance circuits and low impedance circuits. The design of voltage follower becomes an important issue when technology is scaled down. Due to the non-linear behavior of threshold voltage (VT) when technology is scaled down, performance of voltage follower is affected. Many versions of voltage followers have been proposed to achieve desirable output in sub-micron and deep sub-micron technologies. The selection of particular topology is dependent upon the requirements and application. In this paper, we have shown the implementation of different topologies in 90 nm technology using the Mentor Graphics Tool. We have done the pre-layout simulation of three different topologies. We have designed these circuits using ICstudio tool and analyzed their output impedance, voltage gain and power dissipation. We have prepared a comparative analysis about them.
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