Implementation of the AES algorithm using a Reconfigurable Functional Unit

Nowadays programmable devices (microprocessors and DSPs) are based on complex architectures optimized for obtaining maximum speed performances that degrades when the implemented application is mostly based on operations on single bit or subset of bits. This kind of data processing and bit manipulation operations can be accelerated by using a Reconfigurable Functional Unit (RFU). In this paper the benefits of using the ADAPTO RFU (Adder-Based Dynamic Architecture for Processing Tailored Operators) [1] [2] to speed up the Advanced Encryption Standard algorithm (AES) is investigated. The paper shows how the ADAPTO architecture is useful for the acceleration the AES algorithm due the efficient implementation of the most complex operations of the algorithm. A comparison in terms of number of assembly instructions is given.

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