Acceleration of RSA Cryptographic Operations Using FPGA Technology

In Embedded Systems, the calculation of RSA cryptographic operations is sometimes hard to achieve if time constraints must be observed. In the following, we present an approach to increase processing power regarding cryptographic operations using FPGA (Field Programmable GateArray) technology. The FPGA, which is present in many designs anyway, computes parts of the operations, allowing the embedded processor to do concurrent calculations. We will have a closer look at RSA, which is an example of a time-consuming asymmetric cryptographic algorithm. We will see that multiplication and squaring are basic operations of a modern RSA implementation and thus have to be computed in an efficient way. We implement those basic operations on an FPGA, which computes them faster than the processor.