Reliability-Enhanced Separated Pre-Charge Sensing Amplifier for Hybrid CMOS/MTJ Logic Circuits

Benefitting from its non-volatility, low power, high speed, nearly infinite endurance, good scalability, and great CMOS compatibility, magnetic tunnel junction (MTJ) embedded in conventional CMOS logic circuits has been proposed as one potentially powerful solution to introduce non-volatility in today’s programmable logic circuits, which is envisioned to extend Moore’s law. However, a critical issue in such hybrid CMOS/MTJ logic circuit is the reliable transmission of MTJ electric signals to the CMOS electronics, i.e., the requirement of nearly zero read/write error for logic applications. In this paper, a reliability-enhanced separated pre-charge sensing amplifier (RESPCSA) is proposed for hybrid CMOS/MTJ logic circuits. By adding two feedback paths with only two transistors between its discharge and evaluation terminal, such proposed RESPCSA can achieve a more and more larger dynamic resistance difference between its two discharge branches with the MTJs during the discharge phase, thereby obtaining a large sensing margin. By using a commercial CMOS 40 nm design kit and a physics-based MTJ compact model, hybrid CMOS/MTJ transient and Monte-Carlo statistic simulations have been conducted to demonstrate its functionality and evaluate its performance, respectively.