Six‐port digital receivers (SPDRs): A new design approach

A new SPDR design approach is proposed. The receier contains an RF discriminator, power detectors, a signal leel comparison circuit, a decoder, and data and carrier recoery circuits for BPSK and QPSK signals. The new receier operates solely on analog circuits, and the proposed design isalidated with circuit and system simulations of an RF discriminator and a Costas-type phase-locked loop, demonstration of a demodulator at 2.4 GHz, and MMIC fabrication of an RF discrimina- tor at 15 GHz. The new design approach offers interesting possibilities to achiee SPDR-on-a-chip. Q 2000 John Wiley & Sons, Inc. Microwave Opt Technol Lett 25: 356)360, 2000.