Multi-chip module burn-in has been utilized at IBM for several years. The current module burn-in tool stresses 121 chip multi-chip modules used in the IBM ES/9000 mainframes. MCM level burn-in has been performed on alumina and glass-ceramic substrates with bipolar and CMOS chip technologies resulting in various challenges to tool design and proem development. This paper will focus on the module burn-in tool, key technical challenges to implementing MCM burn-in and the experience of performing MCM level burn-in. The key technical challenges: thermal management, thermal/mechanical stress issues, electrical stimulation and module testability will be reviewed. The impact of design for test on burn-in will be discussed. A review of the defect mechanisms and experimental results will be covered. An overview of a cost model which compares MCM level burn-in against known-good-die burn-in will be reviewed to demonstrate the merits of module level burn-in. The paper will conclude with the future plans to address the rapidly expanding OEM MCM market.
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