Through-Si-via (TSV) Keep-Out-Zone (KOZ) in SOI Photonics Interposer: A Study of the Impact of TSV-Induced Stress on Si Ring Resonators

Si photonic devices are sensitive to the change in refractive index on the Si-on-insulator (SOI) platform. One of the critical limitations in the compact 3D photonic integration circuit is the through-Si-via (TSV)-induced stress, which affects the performances of Si photonic devices integrated in interposer. We build a model to analyze and simulate the wavelength shift of the ring resonator caused by the effective-refractive-index change in the waveguide, arising from TSV-induced stress in the SOI interposer. Double-cascaded ring resonators integrated in the SOI interposer were fabricated and their wavelength shifts were characterized. The results show that the resonance wavelength shift on the order of 0.1 nm can be caused by the TSV-induced stress for , where d and R are the distance between the TSV and the Si waveguide, and the radius of TSV, respectively. This shift results in performance deviation from the target of design. Finally, this paper proposes a TSV keep-out-zone for the Si photonic ring resonator and a compact scaling of the SOI photonics interposer.

[1]  Dan-Xia Xu,et al.  Wavelength-Dependent Model of a Ring Resonator Sensor Excited by a Directional Coupler , 2009, Journal of Lightwave Technology.

[2]  J. Bowers,et al.  III‐V/silicon photonics for on‐chip and intra‐chip optical interconnects , 2010 .

[3]  Wim Bogaerts,et al.  Photonics-CMOS 3D integration: copper through-silicon-via approach , 2009 .

[4]  Suk-kyu Ryu,et al.  Impact of Near-Surface Thermal Stresses on Interfacial Reliability of Through-Silicon Vias for 3-D Interconnects , 2011, IEEE Transactions on Device and Materials Reliability.

[5]  Jason T. S. Liao,et al.  Optical I/O technology for tera-scale computing , 2009, ISSCC 2009.

[6]  J. Witzens,et al.  Monolithically integrated high-speed CMOS photonic transceivers , 2008, 2008 5th IEEE International Conference on Group IV Photonics.

[7]  Yasuhiko Arakawa,et al.  Silicon photonics for next generation system integration platform , 2013, IEEE Communications Magazine.

[8]  Ashok V. Krishnamoorthy,et al.  Computer Systems Based on Silicon Photonic Interconnects A proposed supercomputer-on-a-chip with optical interconnections between processing elements will require development of new lower-energy optical components and new circuit architectures that match electrical datapaths to complementary optical , 2009 .

[9]  Suk-kyu Ryu,et al.  Thermo-mechanical reliability of 3-D ICs containing through silicon vias , 2009, 2009 59th Electronic Components and Technology Conference.

[10]  Christopher Batten,et al.  Silicon-photonic clos networks for global on-chip communication , 2009, 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip.

[11]  Ashok V. Krishnamoorthy,et al.  A Monolithic 25-Gb/s Transceiver With Photonic Ring Modulators and Ge Detectors in a 130-nm CMOS SOI Process , 2012, IEEE Journal of Solid-State Circuits.

[12]  R. Stephenson A and V , 1962, The British journal of ophthalmology.

[13]  Luca P. Carloni,et al.  Photonic NoC for DMA Communications in Chip Multiprocessors , 2007 .

[14]  Ting Hu,et al.  Tunable Fano resonances based on two-beam interference in microring resonator , 2013 .

[15]  M. Huang Stress effects on the performance of optical waveguides , 2003 .

[16]  Zhigang Suo,et al.  Matrix cracking in intermetallic composites caused by thermal expansion mismatch , 1991 .

[17]  H. Thacker,et al.  A tunable 1x4 silicon CMOS photonic wavelength multiplexer/demultiplexer for dense optical interconnects. , 2010, Optics express.

[18]  P. Soussan,et al.  Comprehensive analysis of the impact of single and arrays of through silicon vias induced stress on high-k / metal gate CMOS performance , 2010, 2010 International Electron Devices Meeting.

[19]  Silicon-Photonics Devices for Low-Power, High-Bandwidth Optical I/O , 2012 .

[20]  Yasuhiko Arakawa,et al.  Demonstration of 12.5-Gbps optical interconnects integrated with lasers, optical splitters, optical modulators and photodetectors on a single silicon substrate , 2014 .

[21]  B. Jalali,et al.  Silicon Photonics , 2006, Journal of Lightwave Technology.

[22]  C. Zhang,et al.  Characterization and Design of Through-Silicon Via Arrays in Three-Dimensional ICs Based on Thermomechanical Modeling , 2011, IEEE Transactions on Electron Devices.

[23]  N. G. Tarr,et al.  Birefringence control using stress engineering in silicon-on-insulator (SOI) waveguides , 2005, Journal of Lightwave Technology.

[24]  Michal Lipson,et al.  First demonstration of long-haul transmission using silicon microring modulators. , 2010, Optics express.

[25]  T Pinguet,et al.  A Grating-Coupler-Enabled CMOS Photonics Platform , 2011, IEEE Journal of Selected Topics in Quantum Electronics.

[26]  Cary Gunn,et al.  CMOS Photonics for High-Speed Interconnects , 2006, IEEE Micro.

[27]  D. Ahn,et al.  Electronic-photonic integrated circuits on the CMOS platform , 2006, SPIE OPTO.

[28]  Nahum Izhaky,et al.  Integration challenge of silicon photonics with microelectronics , 2005 .

[29]  D. Griffiths Introduction to Electrodynamics , 2017 .

[30]  R. Soref,et al.  The Past, Present, and Future of Silicon Photonics , 2006, IEEE Journal of Selected Topics in Quantum Electronics.

[31]  Christopher Batten,et al.  Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics , 2009, IEEE Micro.