Fabrication of ambipolar gate-all-around field-effect transistors using silicon nanobridge arrays

Nanowire bridges have been almost dormant in a nanostructured device community due to the challenges in reproducible growth and device fabrication. In this work, we present simple methods for creating silicon nanobridge arrays with repeatability, and demonstrate integration of gate-all-around field-effect-transistors in the arrays. P-type silicon nanowires air-bridges were synthesized using gold nanoparticles via the VLS technique on the array of predefined silicon electrode-pairs, and then surrounding gates were formed on the suspended air-bridge nanowires. The nanowire air-bridge field-effect-transistors with the surrounding gate exhibited p-type accumulation-mode characteristics with a subthreshold swing of 187 mV/dec and an on/off current ratio of 1.6×106. Despite the surrounding gate that helps gate biases govern the channel, off current substantially increased as drain bias increases. This ambipolar current-voltage property was attributable to gate-induced-drain-leakage at the overlap of gate and drain electrodes and trap-assisted tunneling at the nanowire and electrode connection.