Design and implementation of phase correlation based motion estimator

This paper describes an architecture for the efficient computation of motion estimation based on phase correlation (PC). The entire block has been implemented on a Virtex2 FPGA, and particular care has been posed on the throughput requirements in a video coding framework. These tight requirements lead to the need for high performance solutions for both the discrete Fourier transform (DFT) block and the vector normalization engine. The DFT stage has been implemented with a pipelined decimation in time (DIT) flow, while a multiplierless CORDIC-based structure is used for the vector normalization

[1]  Graham A. Thomas,et al.  Motion estimation for the correction of twin-lens telecine flicker , 1996, Proceedings of 3rd IEEE International Conference on Image Processing.

[2]  Hsueh-Ming Hang,et al.  A New Motion Estimation Method Using Frequency Components , 1997, J. Vis. Commun. Image Represent..

[3]  G. A. Thomas,et al.  Television motion measurement for DATV and other applications , 1987 .

[4]  C. D. Kuglin,et al.  The phase correlation image alignment method , 1975 .

[5]  Truong Q. Nguyen,et al.  A novel de-interlacing technique based on phase plane correlation motion estimation , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[6]  Keshab K. Parhi,et al.  Evaluation of CORDIC Algorithms for FPGA Design , 2002, J. VLSI Signal Process..