论文信息 - 1.25/10.3-Gbit/s dual-rate burst-mode receiver with automatic bit-rate discrimination circuit for coexisting PON systems

1.25/10.3-Gbit/s dual-rate burst-mode receiver with automatic bit-rate discrimination circuit for coexisting PON systems

A 1.25-/10.3-Gbit/s parallel-type dual-rate burst-mode receiver with a burst-mode bit-rate discrimination circuit (B-BDC) for coexisting systems is demonstrated. The settling time including B-BDC is less than 250 ns for burst inputs with extremely different powers.

Kazutaka Hara | Naoto Yoshimoto | Hirotaka Nakamura | Hisaya Hadama | Shunji Kimura

[1] K. Hara,et al. AC-Coupled Burst-Mode Transmitter Using Baseline-Wander Common-Mode-Rejection Technique for 10-Gbit/s-Class PON Systems , 2008, Journal of Lightwave Technology.

[2] Woo-Young Choi,et al. 1.25/2.5-Gb/s Dual Bit-Rate Burst-Mode Clock Recovery Circuits in 0.18-$\mu\hbox{m}$ CMOS Technology , 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.