AnySP: Anytime Anywhere Anyway Signal Processing

Looking forward, the computation requirements of mobile devices will increase by one to two orders of magnitude, but their power requirements will remain stringent to ensure reasonable battery lifetimes. Scaling existing approaches won't suffice; instead, the hardware's inherent computational efficiency, programmability, and adaptability must change. AnySP, a fully programmable architecture that targets multiple application domains, addresses these challenges for next-generation mobile signal processing.

[1]  Henk Corporaal,et al.  MOVE: a framework for high-performance processor design , 1991, Proceedings of the 1991 ACM/IEEE Conference on Supercomputing (Supercomputing '91).

[2]  Baher Haroun,et al.  A novel reduced swing CMOS bus interface circuit for high speed low power VLSI systems , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[3]  Uri C. Weiser,et al.  Intel MMX for multimedia PCs , 1997, Commun. ACM.

[4]  Vladimir M. Pentkovski,et al.  Implementing Streaming SIMD Extensions on the Pentium III Processor , 2000, IEEE Micro.

[5]  David A. Patterson,et al.  Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks , 2002, 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings..

[6]  Scott A. Mahlke,et al.  Systematic register bypass customization for application-specific processors , 2003, Proceedings IEEE International Conference on Application-Specific Systems, Architectures, and Processors. ASAP 2003.

[7]  R. Baines,et al.  The picoArray and reconfigurable baseband processing for wireless basestations , 2003 .

[8]  Christopher Batten,et al.  The Vector-Thread Architecture , 2004, ISCA 2004.

[9]  William J. Dally,et al.  Evaluating the Imagine stream architecture , 2004, Proceedings. 31st Annual International Symposium on Computer Architecture, 2004..

[10]  Mayan Moudgill,et al.  The Sandbridge Sandblaster Communications Processor , 2004 .

[11]  Nathan Clark,et al.  An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors , 2005, ISCA 2005.

[12]  Chen-Yi Lee,et al.  A low-power H.264/AVC decoder , 2005, 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test, 2005. (VLSI-TSA-DAT)..

[13]  Mamoru Sawahashi,et al.  Field Expelriments on Real-Time 1-Gbps High-Speed Packet Transmission in MIMO-OFDM Broadband Packet Radio Access , 2006, 2006 IEEE 63rd Vehicular Technology Conference.

[14]  Hyunseok Lee,et al.  SODA: A Low-power Architecture For Software Radio , 2006, 33rd International Symposium on Computer Architecture (ISCA'06).

[15]  R. Guerrieri,et al.  XiSystem: a XiRisc-based SoC with reconfigurable IO module , 2005, IEEE Journal of Solid-State Circuits.

[16]  Hyunseok Lee,et al.  The Next Generation Challenge for Software Defined Radio , 2007, SAMOS.

[17]  Diederik Verkest,et al.  A Customized Cross-Bar for Data-Shuffling in Domain-Specific SIMD Processors , 2007, ARCS.

[18]  Preeti Ranjan Panda,et al.  Power Reduction in VLIW Processor with Compiler Driven Bypass Network , 2007, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07).

[19]  Ulrich Ramacher.  Software-Defined Radio Prospects for Multistandard Mobile Phones , 2007, Computer.

[20]  David Blaauw,et al.  Energy efficient near-threshold chip multi-processing , 2007, Proceedings of the 2007 international symposium on Low power electronics and design (ISLPED '07).

[21]  Larrabee: A many-Core x86 architecture for visual computing , 2008, 2008 IEEE Hot Chips 20 Symposium (HCS).

[22]  Scott A. Mahlke,et al.  From SODA to scotch: The evolution of a wireless baseband processor , 2008, 2008 41st IEEE/ACM International Symposium on Microarchitecture.

[23]  Yunsi Fei,et al.  Reducing power consumption of embedded processors through register file partitioning and compiler support , 2008, 2008 International Conference on Application-Specific Systems, Architectures and Processors.