The National Technology Roadmap for Semiconductors (NTRS) presents projections and goals for microelectronics over the next fifteen years. A set of physical and empirical models encompassing material, device, circuit, architecture, interconnection, and packaging characteristics that describe microelectronic systems have been captured in the first generation of GENESYS, a GENEric SYstem Simulator. From technology parameters projected in the NTRS, GENESYS predicts maximum clock frequency, physical size, power dissipation, and packaging requirements of an ASIC. The outputs of GENESYS are compared to the on-chip clock frequency, chip size, and maximum power projections of the NTRS for ASICs, and then used both to calibrate GENESYS and to subject the NTRS projections to self-consistency checks.
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